43 parameter LAST_FRAME_BITS=
16,
// number of bits in frame counter (before rolls over) 49 input xclk,
// global clock input, compressor single clock rate 50 input mclk,
// global system/memory clock 51 input mrst,
// @posedge mclk, sync reset 52 input xrst,
// @posedge xclk, sync reset 57 // TODO: delay vsync_late if still compressing previous frame in multi-frame buffer mode 59 input cmprs_run,
// @mclk enable propagation of vsync_late to frame_start_dst in bonded(sync to src) mode 60 input cmprs_standalone,
// @mclk single-cycle: generate a single frame_start_dst in unbonded (not synchronized) mode. 61 // cmprs_run should be off 62 input sigle_frame_buf,
// memory controller uses a single frame buffer (frame_number_* == 0), use other sync 63 input vsync_late,
// @mclk delayed start of frame, @xclk. In 353 it was 16 lines after VACT active 64 // source channel should already start, some delay give time for sequencer commands 65 // that should arrive before it 66 input frame_started,
// @xclk started first macroblock (checking for broken frames) 68 output frame_start_dst,
// @mclk - trigger receive (tiled) memory channel (it will take care of single/repetitive 69 // this output either follows vsync_late (reclocks it) or generated in non-bonded mode 70 // (compress from memory) 73 input frame_done_src,
// single-cycle pulse when the full frame (window) was transferred to/from DDR3 memory 74 // frame_done_src is later than line_unfinished_src/ frame_number_src changes 75 // Used withe a single-frame buffers 79 input frame_done,
// input - single-cycle pulse when the full frame (window) was transferred to/from DDR3 memory 80 output reg suspend,
// suspend reading data for this channel - waiting for the source data 83 output reg force_flush_long,
// force flush (abort frame), can be any clock and may last until stuffer_done_mclk 84 // stuffer will re-clock and extract 0->1 transition 90 Abort frame (force flush) if: 91 a) "broken frame" - attempted to start a new frame before previous one was completely read from the memory 92 b) turned off enable while frame was being compressed 93 Abort frame lasts until flush end or timeout expire 95 // wire vsync_late_mclk; // single mclk cycle, reclocked from vsync_late 96 // wire frame_started_mclk; 99 reg frames_differ;
// src and dest point to different frames (single-frame buffer mode), disregard line_unfinished_* 100 reg frames_numbers_differ;
// src and dest point to different frames (multi-frame buffer mode), disregard line_unfinished_* 103 reg reading_frame_r;
// compressor is reading frame data (make sure input is done before starting next frame, otherwise make it a broken frame 110 // reg cmprs_en_xclk; 117 // always @ (posedge xclk) begin 118 // cmprs_en_xclk <=cmprs_en; 157 // suspend <= !bonded_mode && ((sigle_frame_buf ? frames_differ : frames_numbers_differ) || line_numbers_sync); 158 // suspend <= bonded_mode && ((sigle_frame_buf ? frames_differ : frames_numbers_differ) || !line_numbers_sync); 164 // pulse_cross_clock vsync_late_mclk_i (.rst(xrst), .src_clk(xclk), .dst_clk(mclk), .in_pulse(cmprs_en_xclk && vsync_late), .out_pulse(vsync_late_mclk),.busy());
[LAST_FRAME_BITS-1:0] 1600frame_number_src
frame_started_i pulse_cross_clock
1620timeoutreg[CMPRS_TIMEOUT_BITS-1:0]
[LAST_FRAME_BITS-1:0] 1603frame_number
1614frames_numbers_differreg
[FRAME_HEIGHT_BITS-1:0] 1599line_unfinished_src
1619stuffer_running_mclk_rreg
[FRAME_HEIGHT_BITS-1:0] 1602line_unfinished