2 * @file x393_simulation_parameters.vh
4 * @author Andrey Filippov
6 * @brief Simulation-specific parameters for the x393
8 * @copyright Copyright (c) 2015 Elphel, Inc.
12 * x393_simulation_parameters.vh is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation, either version 3 of the License, or
15 * (at your option) any later version.
17 * x393_simulation_parameters.vh is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program. If not, see <http://www.gnu.org/licenses/> .
25 * Additional permission under GNU GPL version 3 section 7:
26 * If you modify this Program, or any covered work, by linking or combining it
27 * with independent modules provided by the FPGA vendor only (this permission
28 * does not extend to any 3-rd party modules, "soft cores" or macros) under
29 * different license terms solely for the purpose of generating binary "bitstream"
30 * files and/or simulating the code, the copyright holders of this Program give
31 * you the right to distribute the covered work without those independent modules
32 * as long as the source code for them is available from the FPGA vendor free of
33 * charge, and there is no dependence on any encrypted modules for simulating of
34 * the combined code. This permission applies to you if the distributed code
35 * contains all the components and scripts required to completely simulate it
36 * with at least one of the Free Software programs.
38 , // to continue previous parameter list
39 parameter NUM_INTERRUPTS = 9,
41 parameter integer AXI_RDADDR_LATENCY= 2, // 2, //2, //2,
42 parameter integer AXI_WRADDR_LATENCY= 1, // 1, //2, //4,
43 parameter integer AXI_WRDATA_LATENCY= 2, // 1, //1, //1
44 parameter integer AXI_TASK_HOLD=1.0,
46 // parameter [1:0] DEFAULT_STATUS_MODE=3,
47 parameter SIMUL_AXI_READ_WIDTH=16,
49 parameter MEMCLK_PERIOD = 5.0,
51 parameter FCLK0_PERIOD = 40.91, // 24.444MHz
53 parameter FCLK0_PERIOD = 41.667, // 24MHz
55 parameter FCLK1_PERIOD = 0.0,
57 // parameter SENSOR12BITS_LLINE = 192, // 1664;// line duration in clocks
58 // parameter SENSOR12BITS_NCOLS = 66, //58; //56; // 129; //128; //1288;
59 // parameter SENSOR12BITS_NROWS = 18, // 16; // 1032;
60 // parameter SENSOR12BITS_NROWB = 1, // number of "blank rows" from vact to 1-st hact
61 // parameter SENSOR12BITS_NROWA = 1, // number of "blank rows" from last hact to end of vact
62 // parameter nAV = 24, //240; // clocks from ARO to VACT (actually from en_dclkd)
63 // parameter SENSOR12BITS_NBPF = 20, //16; // bpf length
64 parameter SENSOR_IMAGE_TYPE0 = "RUN1", //"NORM", // "RUN1",
65 parameter SENSOR_IMAGE_TYPE1 = "RUN1",
66 parameter SENSOR_IMAGE_TYPE2 = "RUN1", // "NORM", // "RUN1",
67 parameter SENSOR_IMAGE_TYPE3 = "RUN1",
69 parameter SIMULATE_CMPRS_CMODE0 = CMPRS_CBIT_CMODE_JPEG18,
70 parameter SIMULATE_CMPRS_CMODE1 = CMPRS_CBIT_CMODE_JPEG18,
71 parameter SIMULATE_CMPRS_CMODE2 = CMPRS_CBIT_CMODE_JP4,
72 parameter SIMULATE_CMPRS_CMODE3 = CMPRS_CBIT_CMODE_JP4,
73 // parameter SIMULATE_CMPRS_CMODE2 = CMPRS_CBIT_CMODE_JPEG18,
74 // parameter SIMULATE_CMPRS_CMODE3 = CMPRS_CBIT_CMODE_JPEG18,
75 // CMPRS_CBIT_CMODE_JPEG18, //input [31:0] cmode; // [13:9] color mode:
76 // parameter CMPRS_CBIT_CMODE_JPEG18 = 4'h0, // color 4:2:0
77 // parameter CMPRS_CBIT_CMODE_MONO6 = 4'h1, // mono 4:2:0 (6 blocks)
78 // parameter CMPRS_CBIT_CMODE_JP46 = 4'h2, // jp4, 6 blocks, original
79 // parameter CMPRS_CBIT_CMODE_JP46DC = 4'h3, // jp4, 6 blocks, dc -improved
80 // parameter CMPRS_CBIT_CMODE_JPEG20 = 4'h4, // mono, 4 blocks (but still not actual monochrome JPEG as the blocks are scanned in 2x2 macroblocks)
81 // parameter CMPRS_CBIT_CMODE_JP4 = 4'h5, // jp4, 4 blocks, dc-improved
82 // parameter CMPRS_CBIT_CMODE_JP4DC = 4'h6, // jp4, 4 blocks, dc-improved
83 // parameter CMPRS_CBIT_CMODE_JP4DIFF = 4'h7, // jp4, 4 blocks, differential
84 // parameter CMPRS_CBIT_CMODE_JP4DIFFHDR = 4'h8, // jp4, 4 blocks, differential, hdr
85 // parameter CMPRS_CBIT_CMODE_JP4DIFFDIV2 = 4'h9, // jp4, 4 blocks, differential, divide by 2
86 // parameter CMPRS_CBIT_CMODE_JP4DIFFHDRDIV2 = 4'ha, // jp4, 4 blocks, differential, hdr,divide by 2
87 // parameter CMPRS_CBIT_CMODE_MONO1 = 4'hb, // mono JPEG (not yet implemented)
88 // parameter CMPRS_CBIT_CMODE_MONO4 = 4'he, // mono 4 blocks
93 parameter SENSOR12BITS_NGPL = 8, // bpf to hact
94 parameter SENSOR12BITS_NVLO = 1, // VACT=0 in video mode (clocks)
95 //parameter tMD = 14; //
96 //parameter tDDO = 10; // some confusion here - let's assume that it is from DCLK to Data out
98 parameter SENSOR12BITS_TMD = 1, //
99 parameter SENSOR12BITS_TDDO = 1, // some confusion here - let's assume that it is from DCLK to Data out
100 parameter SENSOR12BITS_TDDO1 = 2, //
102 parameter SENSOR12BITS_TMD = 4, //
103 parameter SENSOR12BITS_TDDO = 2, // some confusion here - let's assume that it is from DCLK to Data out
104 parameter SENSOR12BITS_TDDO1 = 5, //
106 // parameter SENSOR12BITS_TRIGDLY = 8, // delay between trigger input and start of output (VACT) in lines
107 // parameter SENSOR12BITS_RAMP = 1, // 1 - ramp, 0 - random (now - sensor.dat)
108 // parameter SENSOR12BITS_NEW_BAYER = 0, // 0 - "old" tiles (16x16, 1 - new - (18x18)
110 parameter HISTOGRAM_LEFT = 0, // 2; // left
111 parameter HISTOGRAM_TOP = 8, // 2, // top
112 parameter HISTOGRAM_WIDTH = 6, // width
113 parameter HISTOGRAM_HEIGHT = 6, // height
114 parameter HISTOGRAM_START_PAGE = 20'h12345,
115 parameter FRAME_WIDTH_ROUND_BITS = 9, // multiple of 512 pixels (32 16-byte bursts) (11 - ful SDRAM page)
117 parameter WOI_WIDTH= 64,
118 parameter WOI_HEIGHT= 32,
120 parameter QUADRANTS_PXD_HACT_VACT = 6'h01, // 2 bits each: data-0, hact - 1, vact - 2
121 // 90-degree shifts for data [1:0], hact [3:2] and vact [5:4]
122 parameter SENSOR_PRIORITY = 1000
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