x393 Member List

This is the complete list of members for x393, including all inherited members.

ADDRESS_BITS	axibram_read	Parameter
CMDFRAMESEQ_ADDR	cmd_frame_sequencer	Parameter
CMDFRAMESEQ_MASK	cmd_frame_sequencer	Parameter
AXI_WR_ADDR_BITS	cmd_frame_sequencer	Parameter
CMDFRAMESEQ_DEPTH	cmd_frame_sequencer	Parameter
CMDFRAMESEQ_ABS	cmd_frame_sequencer	Parameter
CMDFRAMESEQ_REL	cmd_frame_sequencer	Parameter
CMDFRAMESEQ_CTRL	cmd_frame_sequencer	Parameter
CMDFRAMESEQ_RST_BIT	cmd_frame_sequencer	Parameter
CMDFRAMESEQ_RUN_BIT	cmd_frame_sequencer	Parameter
CMDFRAMESEQ_IRQ_BIT	cmd_frame_sequencer	Parameter
mrst	cmd_frame_sequencer	Input
mclk	cmd_frame_sequencer	Input
cmd_ad	cmd_frame_sequencer	Input
cmd_stb	cmd_frame_sequencer	Input
frame_sync	cmd_frame_sequencer	Input
frame_no	cmd_frame_sequencer	Output
waddr	cmd_frame_sequencer	Output
valid	cmd_frame_sequencer	Output
wdata	cmd_frame_sequencer	Output
ackn	cmd_frame_sequencer	Input
is	cmd_frame_sequencer	Output
im	cmd_frame_sequencer	Output
PNTR_WIDH	cmd_frame_sequencer	Parameter
cmd_a	cmd_frame_sequencer	Signal
cmd_we	cmd_frame_sequencer	Signal
cmd_we_r	cmd_frame_sequencer	Signal
cmd_data	cmd_frame_sequencer	Signal
wpage_asap	cmd_frame_sequencer	Signal
wpage_prev	cmd_frame_sequencer	Signal
wpage_next	cmd_frame_sequencer	Signal
wpage_w	cmd_frame_sequencer	Signal
wpage_inc	cmd_frame_sequencer	Signal
reset_cmd	cmd_frame_sequencer	Signal
run_cmd	cmd_frame_sequencer	Signal
reset_on	cmd_frame_sequencer	Signal
seq_enrun	cmd_frame_sequencer	Signal
we_fifo_wp	cmd_frame_sequencer	Signal
next_frame_rq	cmd_frame_sequencer	Signal
pre_wpage_inc	cmd_frame_sequencer	Signal
fifo_wr_pointers_ram	cmd_frame_sequencer	Signal
fifo_wr_pointers_outw	cmd_frame_sequencer	Signal
fifo_wr_pointers_outr	cmd_frame_sequencer	Signal
fifo_wr_pointers_outw_r	cmd_frame_sequencer	Signal
fifo_wr_pointers_outr_r	cmd_frame_sequencer	Signal
d_na	cmd_frame_sequencer	Signal
address_hold	cmd_frame_sequencer	Signal
cmdseq_di	cmd_frame_sequencer	Signal
por	cmd_frame_sequencer	Signal
initialized	cmd_frame_sequencer	Signal
cmd_we_ctl_w	cmd_frame_sequencer	Signal
cmd_we_ctl_r	cmd_frame_sequencer	Signal
cmd_we_abs_w	cmd_frame_sequencer	Signal
cmd_we_abs_r	cmd_frame_sequencer	Signal
cmd_we_rel_w	cmd_frame_sequencer	Signal
cmd_we_rel_r	cmd_frame_sequencer	Signal
cmd_we_any_r	cmd_frame_sequencer	Signal
reset_seq_done	cmd_frame_sequencer	Signal
seq_cmd_wa	cmd_frame_sequencer	Signal
seq_cmd_ra	cmd_frame_sequencer	Signal
page_r	cmd_frame_sequencer	Signal
page_r_inc	cmd_frame_sequencer	Signal
write_left	axibram_write	Signal
rpointer	cmd_frame_sequencer	Signal
read_busy	cmd_frame_sequencer	Signal
conf_send	cmd_frame_sequencer	Signal
commands_pending	cmd_frame_sequencer	Signal
ren	cmd_frame_sequencer	Signal
pre_cmd_seq_w	cmd_frame_sequencer	Signal
valid_r	cmd_frame_sequencer	Signal
cmdseq_do	cmd_frame_sequencer	Signal
irq_bits	cmd_frame_sequencer	Signal
is_r	cmd_frame_sequencer	Signal
im_r	cmd_frame_sequencer	Signal
irq_ctrl	cmd_frame_sequencer	Signal
AXI_WR_ADDR_BITS	cmd_mux	Parameter
CONTROL_ADDR	cmd_mux	Parameter
CONTROL_ADDR_MASK	cmd_mux	Parameter
NUM_CYCLES_LOW_BIT	cmd_mux	Parameter
NUM_CYCLES_00	cmd_mux	Parameter
NUM_CYCLES_01	cmd_mux	Parameter
NUM_CYCLES_02	cmd_mux	Parameter
NUM_CYCLES_03	cmd_mux	Parameter
NUM_CYCLES_04	cmd_mux	Parameter
NUM_CYCLES_05	cmd_mux	Parameter
NUM_CYCLES_06	cmd_mux	Parameter
NUM_CYCLES_07	cmd_mux	Parameter
NUM_CYCLES_08	cmd_mux	Parameter
NUM_CYCLES_09	cmd_mux	Parameter
NUM_CYCLES_10	cmd_mux	Parameter
NUM_CYCLES_11	cmd_mux	Parameter
NUM_CYCLES_12	cmd_mux	Parameter
NUM_CYCLES_13	cmd_mux	Parameter
NUM_CYCLES_14	cmd_mux	Parameter
NUM_CYCLES_15	cmd_mux	Parameter
NUM_CYCLES_16	cmd_mux	Parameter
NUM_CYCLES_17	cmd_mux	Parameter
NUM_CYCLES_18	cmd_mux	Parameter
NUM_CYCLES_19	cmd_mux	Parameter
NUM_CYCLES_20	cmd_mux	Parameter
NUM_CYCLES_21	cmd_mux	Parameter
NUM_CYCLES_22	cmd_mux	Parameter
NUM_CYCLES_23	cmd_mux	Parameter
NUM_CYCLES_24	cmd_mux	Parameter
NUM_CYCLES_25	cmd_mux	Parameter
NUM_CYCLES_26	cmd_mux	Parameter
NUM_CYCLES_27	cmd_mux	Parameter
NUM_CYCLES_28	cmd_mux	Parameter
NUM_CYCLES_29	cmd_mux	Parameter
NUM_CYCLES_30	cmd_mux	Parameter
NUM_CYCLES_31	cmd_mux	Parameter
axi_clk	cmd_mux	Input
mclk	cmd_mux	Input
mrst	cmd_mux	Input
arst	cmd_mux	Input
pre_waddr	cmd_mux	Input
start_wburst	cmd_mux	Input
waddr	cmd_mux	Input
wr_en	cmd_mux	Input
wdata	cmd_mux	Input
busy	cmd_mux	Output
cseq_waddr	cmd_mux	Input
cseq_wr_en	cmd_mux	Input
cseq_wdata	cmd_mux	Input
cseq_ackn	cmd_mux	Output
par_waddr	cmd_mux	Output
par_data	cmd_mux	Output
byte_ad	cmd_mux	Output
ad_stb	cmd_mux	Output
busy_r	cmd_mux	Signal
selected	cmd_mux	Signal
fifo_half_empty	cmd_mux	Signal
selected_w	cmd_mux	Signal
ss	cmd_mux	Signal
par_ad	cmd_mux	Signal
ad_stb_r	cmd_mux	Signal
cmdseq_full_r	cmd_mux	Signal
cseq_waddr_r	cmd_mux	Signal
cseq_wdata_r	cmd_mux	Signal
seq_length	cmd_mux	Signal
seq_busy_r	cmd_mux	Signal
seq_length_rom_a	cmd_mux	Signal
can_start_w	cmd_mux	Signal
start_w	cmd_mux	Signal
start_axi_w	cmd_mux	Signal
fifo_nempty	cmd_mux	Signal
waddr_fifo_out	cmd_mux	Signal
wdata_fifo_out	cmd_mux	Signal
AXI_WR_ADDR_BITS	cmd_readback	Parameter
AXI_RD_ADDR_BITS	cmd_readback	Parameter
CONTROL_RBACK_DEPTH	cmd_readback	Parameter
CONTROL_ADDR	cmd_readback	Parameter
CONTROL_ADDR_MASK	cmd_readback	Parameter
CONTROL_RBACK_ADDR	cmd_readback	Parameter
CONTROL_RBACK_ADDR_MASK	cmd_readback	Parameter
mrst	cmd_readback	Input
arst	cmd_readback	Input
mclk	cmd_readback	Input
axi_clk	cmd_readback	Input
par_waddr	cmd_readback	Input
par_data	cmd_readback	Input
ad_stb	cmd_readback	Input
axird_pre_araddr	cmd_readback	Input
wburst	axibram_write	Signal
axird_start_burst	cmd_readback	Input
axird_raddr	cmd_readback	Input
axird_ren	cmd_readback	Input
axird_rdata	cmd_readback	Output
axird_selected	cmd_readback	Output
DATA_2DEPTH	cmd_readback	Parameter
ram	cmd_readback	Signal
waddr	cmd_readback	Signal
we	cmd_readback	Signal
wdata	cmd_readback	Signal
select_w	cmd_readback	Signal
select_r	cmd_readback	Signal
select_d	cmd_readback	Signal
rd	cmd_readback	Signal
regen	cmd_readback	Signal
axi_rback_rdata	cmd_readback	Signal
axi_rback_rdata_r	cmd_readback	Signal
axird_regen	cmd_readback	Signal
we_w	cmd_readback	Signal
CMDSEQMUX_ADDR	cmd_seq_mux	Parameter
CMDSEQMUX_MASK	cmd_seq_mux	Parameter
CMDSEQMUX_STATUS	cmd_seq_mux	Parameter
AXI_WR_ADDR_BITS	cmd_seq_mux	Parameter
mrst	cmd_seq_mux	Input
mclk	cmd_seq_mux	Input
cmd_ad	cmd_seq_mux	Input
cmd_stb	cmd_seq_mux	Input
status_ad	cmd_seq_mux	Output
status_rq	cmd_seq_mux	Output
status_start	cmd_seq_mux	Input
frame_num0	cmd_seq_mux	Input
waddr0	cmd_seq_mux	Input
wr_en0	cmd_seq_mux	Input
wdata0	cmd_seq_mux	Input
ackn0	cmd_seq_mux	Output
is0	cmd_seq_mux	Input
im0	cmd_seq_mux	Input
frame_num1	cmd_seq_mux	Input
waddr1	cmd_seq_mux	Input
wr_en1	cmd_seq_mux	Input
wdata1	cmd_seq_mux	Input
ackn1	cmd_seq_mux	Output
is1	cmd_seq_mux	Input
im1	cmd_seq_mux	Input
frame_num2	cmd_seq_mux	Input
waddr2	cmd_seq_mux	Input
wr_en2	cmd_seq_mux	Input
wdata2	cmd_seq_mux	Input
ackn2	cmd_seq_mux	Output
is2	cmd_seq_mux	Input
im2	cmd_seq_mux	Input
frame_num3	cmd_seq_mux	Input
waddr3	cmd_seq_mux	Input
wr_en3	cmd_seq_mux	Input
wdata3	cmd_seq_mux	Input
ackn3	cmd_seq_mux	Output
is3	cmd_seq_mux	Input
im3	cmd_seq_mux	Input
waddr_out	cmd_seq_mux	Output
wr_en_out	cmd_seq_mux	Output
wdata_out	cmd_seq_mux	Output
ackn_out	cmd_seq_mux	Input
wr_en	cmd_seq_mux	Signal
pri_one_rr	cmd_seq_mux	Signal
pri_one	cmd_seq_mux	Signal
chn_r	cmd_seq_mux	Signal
rq_any	cmd_seq_mux	Signal
pri_enc_w	cmd_seq_mux	Signal
full_r	cmd_seq_mux	Signal
ackn_w	cmd_seq_mux	Signal
ackn_r	cmd_seq_mux	Signal
is	cmd_seq_mux	Signal
im	cmd_seq_mux	Signal
cmd_data	cmd_seq_mux	Signal
cmd_status	cmd_seq_mux	Signal
DEBUG_ADDR	debug_master	Parameter
DEBUG_MASK	debug_master	Parameter
DEBUG_STATUS_REG_ADDR	debug_master	Parameter
DEBUG_READ_REG_ADDR	debug_master	Parameter
DEBUG_SHIFT_DATA	debug_master	Parameter
DEBUG_LOAD	debug_master	Parameter
DEBUG_SET_STATUS	debug_master	Parameter
DEBUG_CMD_LATENCY	debug_master	Parameter
mclk	debug_master	Input
mrst	debug_master	Input
cmd_ad	debug_master	Input
cmd_stb	debug_master	Input
status_ad	debug_master	Output
status_rq	debug_master	Output
status_start	debug_master	Input
debug_do	debug_master	Output
debug_sl	debug_master	Output
debug_di	debug_master	Input
cmd_a	debug_master	Signal
cmd_data	debug_master	Signal
cmd_we	debug_master	Signal
data_sr	debug_master	Signal
tgl	debug_master	Signal
cntr	debug_master	Signal
ld_r	debug_master	Signal
wlen	axibram_write	Signal
cmd	debug_master	Signal
cmd_reg	debug_master	Signal
debug_latency_plus1	debug_master	Signal
set_status_w	debug_master	Signal
shift32_w	debug_master	Signal
load_w	debug_master	Signal
cmd_reg_dly	debug_master	Signal
shift_done	debug_master	Signal
sensors393.SHIFT_WIDTH	debug_slave	Parameter
compressor393.SHIFT_WIDTH	debug_slave	Parameter
sensors393.READ_WIDTH	debug_slave	Parameter
compressor393.READ_WIDTH	debug_slave	Parameter
sensors393.WRITE_WIDTH	debug_slave	Parameter
compressor393.WRITE_WIDTH	debug_slave	Parameter
sensors393.DEBUG_CMD_LATENCY	debug_slave	Parameter
compressor393.DEBUG_CMD_LATENCY	debug_slave	Parameter
sensors393.mclk	debug_slave	Input
compressor393.mclk	debug_slave	Input
sensors393.mrst	debug_slave	Input
compressor393.mrst	debug_slave	Input
sensors393.debug_di	debug_slave	Input
compressor393.debug_di	debug_slave	Input
sensors393.debug_sl	debug_slave	Input
compressor393.debug_sl	debug_slave	Input
sensors393.debug_do	debug_slave	Output
compressor393.debug_do	debug_slave	Output
sensors393.rd_data	debug_slave	Input
compressor393.rd_data	debug_slave	Input
sensors393.wr_data	debug_slave	Output
compressor393.wr_data	debug_slave	Output
sensors393.stb	debug_slave	Output
compressor393.stb	debug_slave	Output
sensors393.data_sr	debug_slave	Signal
compressor393.data_sr	debug_slave	Signal
sensors393.cmd	debug_slave	Signal
compressor393.cmd	debug_slave	Signal
sensors393.cmd_reg	debug_slave	Signal
compressor393.cmd_reg	debug_slave	Signal
sensors393.cmd_reg_dly	debug_slave	Signal
compressor393.cmd_reg_dly	debug_slave	Signal
sensors393.ext_rdata	debug_slave	Signal
compressor393.ext_rdata	debug_slave	Signal
compressor393.WIDTH	dly_16	Parameter
debug_master.WIDTH	dly_16	Parameter
compressor393.clk	dly_16	Input
debug_master.clk	dly_16	Input
compressor393.rst	dly_16	Input
debug_master.rst	dly_16	Input
compressor393.dly	dly_16	Input
debug_master.dly	dly_16	Input
compressor393.din	dly_16	Input
debug_master.din	dly_16	Input
compressor393.dout	dly_16	Output
debug_master.dout	dly_16	Output
next_wr_address_w	axibram_write	Signal
mcntrl393.DATA_WIDTH	fifo_same_clock	Parameter
sensors393.DATA_WIDTH	fifo_same_clock	Parameter
mult_saxi_wr.DATA_WIDTH	fifo_same_clock	Parameter
axibram_write.DATA_WIDTH	fifo_same_clock	Parameter
axibram_read.DATA_WIDTH	fifo_same_clock	Parameter
mcntrl393.DATA_DEPTH	fifo_same_clock	Parameter
sensors393.DATA_DEPTH	fifo_same_clock	Parameter
mult_saxi_wr.DATA_DEPTH	fifo_same_clock	Parameter
axibram_write.DATA_DEPTH	fifo_same_clock	Parameter
axibram_read.DATA_DEPTH	fifo_same_clock	Parameter
mcntrl393.rst	fifo_same_clock	Input
sensors393.rst	fifo_same_clock	Input
mult_saxi_wr.rst	fifo_same_clock	Input
axibram_write.rst	fifo_same_clock	Input
axibram_read.rst	fifo_same_clock	Input
mcntrl393.clk	fifo_same_clock	Input
sensors393.clk	fifo_same_clock	Input
mult_saxi_wr.clk	fifo_same_clock	Input
axibram_write.clk	fifo_same_clock	Input
axibram_read.clk	fifo_same_clock	Input
mcntrl393.sync_rst	fifo_same_clock	Input
sensors393.sync_rst	fifo_same_clock	Input
mult_saxi_wr.sync_rst	fifo_same_clock	Input
axibram_write.sync_rst	fifo_same_clock	Input
axibram_read.sync_rst	fifo_same_clock	Input
mcntrl393.we	fifo_same_clock	Input
sensors393.we	fifo_same_clock	Input
mult_saxi_wr.we	fifo_same_clock	Input
axibram_write.we	fifo_same_clock	Input
axibram_read.we	fifo_same_clock	Input
mcntrl393.re	fifo_same_clock	Input
sensors393.re	fifo_same_clock	Input
mult_saxi_wr.re	fifo_same_clock	Input
axibram_write.re	fifo_same_clock	Input
axibram_read.re	fifo_same_clock	Input
mcntrl393.data_in	fifo_same_clock	Input
sensors393.data_in	fifo_same_clock	Input
mult_saxi_wr.data_in	fifo_same_clock	Input
axibram_write.data_in	fifo_same_clock	Input
axibram_read.data_in	fifo_same_clock	Input
mcntrl393.data_out	fifo_same_clock	Output
sensors393.data_out	fifo_same_clock	Output
mult_saxi_wr.data_out	fifo_same_clock	Output
axibram_write.data_out	fifo_same_clock	Output
axibram_read.data_out	fifo_same_clock	Output
mcntrl393.nempty	fifo_same_clock	Output
sensors393.nempty	fifo_same_clock	Output
mult_saxi_wr.nempty	fifo_same_clock	Output
axibram_write.nempty	fifo_same_clock	Output
axibram_read.nempty	fifo_same_clock	Output
mcntrl393.half_full	fifo_same_clock	Output
sensors393.half_full	fifo_same_clock	Output
mult_saxi_wr.half_full	fifo_same_clock	Output
axibram_write.half_full	fifo_same_clock	Output
axibram_read.half_full	fifo_same_clock	Output
mcntrl393.DATA_2DEPTH	fifo_same_clock	Parameter
sensors393.DATA_2DEPTH	fifo_same_clock	Parameter
mult_saxi_wr.DATA_2DEPTH	fifo_same_clock	Parameter
axibram_write.DATA_2DEPTH	fifo_same_clock	Parameter
axibram_read.DATA_2DEPTH	fifo_same_clock	Parameter
mcntrl393.fill	fifo_same_clock	Signal
sensors393.fill	fifo_same_clock	Signal
mult_saxi_wr.fill	fifo_same_clock	Signal
axibram_write.fill	fifo_same_clock	Signal
axibram_read.fill	fifo_same_clock	Signal
mcntrl393.inreg	fifo_same_clock	Signal
sensors393.inreg	fifo_same_clock	Signal
mult_saxi_wr.inreg	fifo_same_clock	Signal
axibram_write.inreg	fifo_same_clock	Signal
axibram_read.inreg	fifo_same_clock	Signal
mcntrl393.outreg	fifo_same_clock	Signal
sensors393.outreg	fifo_same_clock	Signal
mult_saxi_wr.outreg	fifo_same_clock	Signal
axibram_write.outreg	fifo_same_clock	Signal
axibram_read.outreg	fifo_same_clock	Signal
mcntrl393.ra	fifo_same_clock	Signal
sensors393.ra	fifo_same_clock	Signal
mult_saxi_wr.ra	fifo_same_clock	Signal
axibram_write.ra	fifo_same_clock	Signal
axibram_read.ra	fifo_same_clock	Signal
mcntrl393.wa	fifo_same_clock	Signal
sensors393.wa	fifo_same_clock	Signal
mult_saxi_wr.wa	fifo_same_clock	Signal
axibram_write.wa	fifo_same_clock	Signal
axibram_read.wa	fifo_same_clock	Signal
mcntrl393.wem	fifo_same_clock	Signal
sensors393.wem	fifo_same_clock	Signal
mult_saxi_wr.wem	fifo_same_clock	Signal
axibram_write.wem	fifo_same_clock	Signal
axibram_read.wem	fifo_same_clock	Signal
mcntrl393.rem	fifo_same_clock	Signal
sensors393.rem	fifo_same_clock	Signal
mult_saxi_wr.rem	fifo_same_clock	Signal
axibram_write.rem	fifo_same_clock	Signal
axibram_read.rem	fifo_same_clock	Signal
mcntrl393.out_full	fifo_same_clock	Signal
sensors393.out_full	fifo_same_clock	Signal
mult_saxi_wr.out_full	fifo_same_clock	Signal
axibram_write.out_full	fifo_same_clock	Signal
axibram_read.out_full	fifo_same_clock	Signal
mcntrl393.ram	fifo_same_clock	Signal
sensors393.ram	fifo_same_clock	Signal
mult_saxi_wr.ram	fifo_same_clock	Signal
axibram_write.ram	fifo_same_clock	Signal
axibram_read.ram	fifo_same_clock	Signal
mcntrl393.ram_nempty	fifo_same_clock	Signal
sensors393.ram_nempty	fifo_same_clock	Signal
mult_saxi_wr.ram_nempty	fifo_same_clock	Signal
axibram_write.ram_nempty	fifo_same_clock	Signal
axibram_read.ram_nempty	fifo_same_clock	Signal
NUM_FRAME_BITS	frame_num_sync	Parameter
LAST_FRAME_BITS	frame_num_sync	Parameter
FRAME_BITS_KEEP	frame_num_sync	Parameter
mrst	frame_num_sync	Input
mclk	frame_num_sync	Input
absolute_frames	frame_num_sync	Input
first_wr_in_frame	frame_num_sync	Input
memory_frames_sensor	frame_num_sync	Input
bram_we_w	axibram_write	Signal
memory_frames_compressor	frame_num_sync	Input
compressed_frames	frame_num_sync	Output
frames_ram0	frame_num_sync	Signal
frames_ram1	frame_num_sync	Signal
frames_ram2	frame_num_sync	Signal
frames_ram3	frame_num_sync	Signal
GPIO_ADDR	gpio393	Parameter
GPIO_MASK	gpio393	Parameter
GPIO_STATUS_REG_ADDR	gpio393	Parameter
GPIO_DRIVE	gpio393	Parameter
GPIO_IBUF_LOW_PWR	gpio393	Parameter
GPIO_IOSTANDARD	gpio393	Parameter
GPIO_SLEW	gpio393	Parameter
GPIO_SET_PINS	gpio393	Parameter
GPIO_SET_STATUS	gpio393	Parameter
GPIO_N	gpio393	Parameter
GPIO_PORTEN	gpio393	Parameter
mclk	gpio393	Input
mrst	gpio393	Input
cmd_ad	gpio393	Input
cmd_stb	gpio393	Input
status_ad	gpio393	Output
status_rq	gpio393	Output
status_start	gpio393	Input
ext_pins	gpio393	Inout
io_pins	gpio393	Output
da	gpio393	Input
da_en	gpio393	Input
db	gpio393	Input
db_en	gpio393	Input
dc	gpio393	Input
dc_en	gpio393	Input
ds	gpio393	Signal
ds_en	gpio393	Signal
ch_en	gpio393	Signal
cmd_data	gpio393	Signal
cmd_a	gpio393	Signal
cmd_we	gpio393	Signal
set_mode_w	gpio393	Signal
set_status_w	gpio393	Signal
ds_en_m	gpio393	Signal
da_en_m	gpio393	Signal
db_en_m	gpio393	Signal
dc_en_m	gpio393	Signal
io_t	gpio393	Signal
io_do	gpio393	Signal
start_write_burst_w	axibram_write	Signal
WIDTH	level_cross_clocks	Parameter
REGISTER	level_cross_clocks	Parameter
FAST0	level_cross_clocks	Parameter
FAST1	level_cross_clocks	Parameter
clk	level_cross_clocks	Input
d_in	level_cross_clocks	Input
d_out	level_cross_clocks	Output
write_in_progress_w	axibram_write	Signal
sensors393.EXTRA_DLY	pulse_cross_clock	Parameter
sensors393.histogram_saxi.EXTRA_DLY	pulse_cross_clock	Parameter
compressor393.EXTRA_DLY	pulse_cross_clock	Parameter
timing393.EXTRA_DLY	pulse_cross_clock	Parameter
event_logger.pulse_cross_clock.EXTRA_DLY	pulse_cross_clock	Parameter
event_logger.imu_exttime393.EXTRA_DLY	pulse_cross_clock	Parameter
mult_saxi_wr_inbuf.EXTRA_DLY	pulse_cross_clock	Parameter
mult_saxi_wr.mult_saxi_wr_pointers.EXTRA_DLY	pulse_cross_clock	Parameter
mult_saxi_wr.pulse_cross_clock.EXTRA_DLY	pulse_cross_clock	Parameter
sata_ahci_top.ahci_sata_layers.EXTRA_DLY	pulse_cross_clock	Parameter
sata_ahci_top.ahci_sata_layers.freq_meter.EXTRA_DLY	pulse_cross_clock	Parameter
sensors393.rst	pulse_cross_clock	Input
sensors393.histogram_saxi.rst	pulse_cross_clock	Input
compressor393.rst	pulse_cross_clock	Input
timing393.rst	pulse_cross_clock	Input
event_logger.pulse_cross_clock.rst	pulse_cross_clock	Input
event_logger.imu_exttime393.rst	pulse_cross_clock	Input
mult_saxi_wr_inbuf.rst	pulse_cross_clock	Input
mult_saxi_wr.mult_saxi_wr_pointers.rst	pulse_cross_clock	Input
mult_saxi_wr.pulse_cross_clock.rst	pulse_cross_clock	Input
sata_ahci_top.ahci_sata_layers.rst	pulse_cross_clock	Input
sata_ahci_top.ahci_sata_layers.freq_meter.rst	pulse_cross_clock	Input
sensors393.src_clk	pulse_cross_clock	Input
sensors393.histogram_saxi.src_clk	pulse_cross_clock	Input
compressor393.src_clk	pulse_cross_clock	Input
timing393.src_clk	pulse_cross_clock	Input
event_logger.pulse_cross_clock.src_clk	pulse_cross_clock	Input
event_logger.imu_exttime393.src_clk	pulse_cross_clock	Input
mult_saxi_wr_inbuf.src_clk	pulse_cross_clock	Input
mult_saxi_wr.mult_saxi_wr_pointers.src_clk	pulse_cross_clock	Input
mult_saxi_wr.pulse_cross_clock.src_clk	pulse_cross_clock	Input
sata_ahci_top.ahci_sata_layers.src_clk	pulse_cross_clock	Input
sata_ahci_top.ahci_sata_layers.freq_meter.src_clk	pulse_cross_clock	Input
sensors393.dst_clk	pulse_cross_clock	Input
sensors393.histogram_saxi.dst_clk	pulse_cross_clock	Input
compressor393.dst_clk	pulse_cross_clock	Input
timing393.dst_clk	pulse_cross_clock	Input
event_logger.pulse_cross_clock.dst_clk	pulse_cross_clock	Input
event_logger.imu_exttime393.dst_clk	pulse_cross_clock	Input
mult_saxi_wr_inbuf.dst_clk	pulse_cross_clock	Input
mult_saxi_wr.mult_saxi_wr_pointers.dst_clk	pulse_cross_clock	Input
mult_saxi_wr.pulse_cross_clock.dst_clk	pulse_cross_clock	Input
sata_ahci_top.ahci_sata_layers.dst_clk	pulse_cross_clock	Input
sata_ahci_top.ahci_sata_layers.freq_meter.dst_clk	pulse_cross_clock	Input
sensors393.in_pulse	pulse_cross_clock	Input
sensors393.histogram_saxi.in_pulse	pulse_cross_clock	Input
compressor393.in_pulse	pulse_cross_clock	Input
timing393.in_pulse	pulse_cross_clock	Input
event_logger.pulse_cross_clock.in_pulse	pulse_cross_clock	Input
event_logger.imu_exttime393.in_pulse	pulse_cross_clock	Input
mult_saxi_wr_inbuf.in_pulse	pulse_cross_clock	Input
mult_saxi_wr.mult_saxi_wr_pointers.in_pulse	pulse_cross_clock	Input
mult_saxi_wr.pulse_cross_clock.in_pulse	pulse_cross_clock	Input
sata_ahci_top.ahci_sata_layers.in_pulse	pulse_cross_clock	Input
sata_ahci_top.ahci_sata_layers.freq_meter.in_pulse	pulse_cross_clock	Input
sensors393.out_pulse	pulse_cross_clock	Output
sensors393.histogram_saxi.out_pulse	pulse_cross_clock	Output
compressor393.out_pulse	pulse_cross_clock	Output
timing393.out_pulse	pulse_cross_clock	Output
event_logger.pulse_cross_clock.out_pulse	pulse_cross_clock	Output
event_logger.imu_exttime393.out_pulse	pulse_cross_clock	Output
mult_saxi_wr_inbuf.out_pulse	pulse_cross_clock	Output
mult_saxi_wr.mult_saxi_wr_pointers.out_pulse	pulse_cross_clock	Output
mult_saxi_wr.pulse_cross_clock.out_pulse	pulse_cross_clock	Output
sata_ahci_top.ahci_sata_layers.out_pulse	pulse_cross_clock	Output
sata_ahci_top.ahci_sata_layers.freq_meter.out_pulse	pulse_cross_clock	Output
sensors393.busy	pulse_cross_clock	Output
sensors393.histogram_saxi.busy	pulse_cross_clock	Output
compressor393.busy	pulse_cross_clock	Output
timing393.busy	pulse_cross_clock	Output
event_logger.pulse_cross_clock.busy	pulse_cross_clock	Output
event_logger.imu_exttime393.busy	pulse_cross_clock	Output
mult_saxi_wr_inbuf.busy	pulse_cross_clock	Output
mult_saxi_wr.mult_saxi_wr_pointers.busy	pulse_cross_clock	Output
mult_saxi_wr.pulse_cross_clock.busy	pulse_cross_clock	Output
sata_ahci_top.ahci_sata_layers.busy	pulse_cross_clock	Output
sata_ahci_top.ahci_sata_layers.freq_meter.busy	pulse_cross_clock	Output
sensors393.EXTRA_DLY_SAFE	pulse_cross_clock	Parameter
sensors393.histogram_saxi.EXTRA_DLY_SAFE	pulse_cross_clock	Parameter
compressor393.EXTRA_DLY_SAFE	pulse_cross_clock	Parameter
timing393.EXTRA_DLY_SAFE	pulse_cross_clock	Parameter
event_logger.pulse_cross_clock.EXTRA_DLY_SAFE	pulse_cross_clock	Parameter
event_logger.imu_exttime393.EXTRA_DLY_SAFE	pulse_cross_clock	Parameter
mult_saxi_wr_inbuf.EXTRA_DLY_SAFE	pulse_cross_clock	Parameter
mult_saxi_wr.mult_saxi_wr_pointers.EXTRA_DLY_SAFE	pulse_cross_clock	Parameter
mult_saxi_wr.pulse_cross_clock.EXTRA_DLY_SAFE	pulse_cross_clock	Parameter
sata_ahci_top.ahci_sata_layers.EXTRA_DLY_SAFE	pulse_cross_clock	Parameter
sata_ahci_top.ahci_sata_layers.freq_meter.EXTRA_DLY_SAFE	pulse_cross_clock	Parameter
sensors393.in_reg	pulse_cross_clock	Signal
sensors393.histogram_saxi.in_reg	pulse_cross_clock	Signal
compressor393.in_reg	pulse_cross_clock	Signal
timing393.in_reg	pulse_cross_clock	Signal
event_logger.pulse_cross_clock.in_reg	pulse_cross_clock	Signal
event_logger.imu_exttime393.in_reg	pulse_cross_clock	Signal
mult_saxi_wr_inbuf.in_reg	pulse_cross_clock	Signal
mult_saxi_wr.mult_saxi_wr_pointers.in_reg	pulse_cross_clock	Signal
mult_saxi_wr.pulse_cross_clock.in_reg	pulse_cross_clock	Signal
sata_ahci_top.ahci_sata_layers.in_reg	pulse_cross_clock	Signal
sata_ahci_top.ahci_sata_layers.freq_meter.in_reg	pulse_cross_clock	Signal
sensors393.out_reg	pulse_cross_clock	Signal
sensors393.histogram_saxi.out_reg	pulse_cross_clock	Signal
compressor393.out_reg	pulse_cross_clock	Signal
timing393.out_reg	pulse_cross_clock	Signal
event_logger.pulse_cross_clock.out_reg	pulse_cross_clock	Signal
event_logger.imu_exttime393.out_reg	pulse_cross_clock	Signal
mult_saxi_wr_inbuf.out_reg	pulse_cross_clock	Signal
mult_saxi_wr.mult_saxi_wr_pointers.out_reg	pulse_cross_clock	Signal
mult_saxi_wr.pulse_cross_clock.out_reg	pulse_cross_clock	Signal
sata_ahci_top.ahci_sata_layers.out_reg	pulse_cross_clock	Signal
sata_ahci_top.ahci_sata_layers.freq_meter.out_reg	pulse_cross_clock	Signal
sensors393.busy_r	pulse_cross_clock	Signal
sensors393.histogram_saxi.busy_r	pulse_cross_clock	Signal
compressor393.busy_r	pulse_cross_clock	Signal
timing393.busy_r	pulse_cross_clock	Signal
event_logger.pulse_cross_clock.busy_r	pulse_cross_clock	Signal
event_logger.imu_exttime393.busy_r	pulse_cross_clock	Signal
mult_saxi_wr_inbuf.busy_r	pulse_cross_clock	Signal
mult_saxi_wr.mult_saxi_wr_pointers.busy_r	pulse_cross_clock	Signal
mult_saxi_wr.pulse_cross_clock.busy_r	pulse_cross_clock	Signal
sata_ahci_top.ahci_sata_layers.busy_r	pulse_cross_clock	Signal
sata_ahci_top.ahci_sata_layers.freq_meter.busy_r	pulse_cross_clock	Signal
cmd_seq_mux.STATUS_REG_ADDR	status_generate	Parameter
mcntrl393.mcntrl_tiled_rw.STATUS_REG_ADDR	status_generate	Parameter
mcntrl393.mcntrl_ps_pio.STATUS_REG_ADDR	status_generate	Parameter
mcntrl393.memctrl16.status_generate.STATUS_REG_ADDR	status_generate	Parameter
mcntrl393.memctrl16.mcontr_sequencer.STATUS_REG_ADDR	status_generate	Parameter
membridge.STATUS_REG_ADDR	status_generate	Parameter
gpio393.STATUS_REG_ADDR	status_generate	Parameter
event_logger.STATUS_REG_ADDR	status_generate	Parameter
mult_saxi_wr.STATUS_REG_ADDR	status_generate	Parameter
clocks393m.STATUS_REG_ADDR	status_generate	Parameter
debug_master.STATUS_REG_ADDR	status_generate	Parameter
cmd_seq_mux.PAYLOAD_BITS	status_generate	Parameter
mcntrl393.mcntrl_tiled_rw.PAYLOAD_BITS	status_generate	Parameter
mcntrl393.mcntrl_ps_pio.PAYLOAD_BITS	status_generate	Parameter
mcntrl393.memctrl16.status_generate.PAYLOAD_BITS	status_generate	Parameter
mcntrl393.memctrl16.mcontr_sequencer.PAYLOAD_BITS	status_generate	Parameter
membridge.PAYLOAD_BITS	status_generate	Parameter
gpio393.PAYLOAD_BITS	status_generate	Parameter
event_logger.PAYLOAD_BITS	status_generate	Parameter
mult_saxi_wr.PAYLOAD_BITS	status_generate	Parameter
clocks393m.PAYLOAD_BITS	status_generate	Parameter
debug_master.PAYLOAD_BITS	status_generate	Parameter
cmd_seq_mux.REGISTER_STATUS	status_generate	Parameter
mcntrl393.mcntrl_tiled_rw.REGISTER_STATUS	status_generate	Parameter
mcntrl393.mcntrl_ps_pio.REGISTER_STATUS	status_generate	Parameter
mcntrl393.memctrl16.status_generate.REGISTER_STATUS	status_generate	Parameter
mcntrl393.memctrl16.mcontr_sequencer.REGISTER_STATUS	status_generate	Parameter
membridge.REGISTER_STATUS	status_generate	Parameter
gpio393.REGISTER_STATUS	status_generate	Parameter
event_logger.REGISTER_STATUS	status_generate	Parameter
mult_saxi_wr.REGISTER_STATUS	status_generate	Parameter
clocks393m.REGISTER_STATUS	status_generate	Parameter
debug_master.REGISTER_STATUS	status_generate	Parameter
cmd_seq_mux.EXTRA_WORDS	status_generate	Parameter
mcntrl393.mcntrl_tiled_rw.EXTRA_WORDS	status_generate	Parameter
mcntrl393.mcntrl_ps_pio.EXTRA_WORDS	status_generate	Parameter
mcntrl393.memctrl16.status_generate.EXTRA_WORDS	status_generate	Parameter
mcntrl393.memctrl16.mcontr_sequencer.EXTRA_WORDS	status_generate	Parameter
membridge.EXTRA_WORDS	status_generate	Parameter
gpio393.EXTRA_WORDS	status_generate	Parameter
event_logger.EXTRA_WORDS	status_generate	Parameter
mult_saxi_wr.EXTRA_WORDS	status_generate	Parameter
clocks393m.EXTRA_WORDS	status_generate	Parameter
debug_master.EXTRA_WORDS	status_generate	Parameter
cmd_seq_mux.EXTRA_REG_ADDR	status_generate	Parameter
mcntrl393.mcntrl_tiled_rw.EXTRA_REG_ADDR	status_generate	Parameter
mcntrl393.mcntrl_ps_pio.EXTRA_REG_ADDR	status_generate	Parameter
mcntrl393.memctrl16.status_generate.EXTRA_REG_ADDR	status_generate	Parameter
mcntrl393.memctrl16.mcontr_sequencer.EXTRA_REG_ADDR	status_generate	Parameter
membridge.EXTRA_REG_ADDR	status_generate	Parameter
gpio393.EXTRA_REG_ADDR	status_generate	Parameter
event_logger.EXTRA_REG_ADDR	status_generate	Parameter
mult_saxi_wr.EXTRA_REG_ADDR	status_generate	Parameter
clocks393m.EXTRA_REG_ADDR	status_generate	Parameter
debug_master.EXTRA_REG_ADDR	status_generate	Parameter
cmd_seq_mux.rst	status_generate	Input
mcntrl393.mcntrl_tiled_rw.rst	status_generate	Input
mcntrl393.mcntrl_ps_pio.rst	status_generate	Input
mcntrl393.memctrl16.status_generate.rst	status_generate	Input
mcntrl393.memctrl16.mcontr_sequencer.rst	status_generate	Input
membridge.rst	status_generate	Input
gpio393.rst	status_generate	Input
event_logger.rst	status_generate	Input
mult_saxi_wr.rst	status_generate	Input
clocks393m.rst	status_generate	Input
debug_master.rst	status_generate	Input
cmd_seq_mux.clk	status_generate	Input
mcntrl393.mcntrl_tiled_rw.clk	status_generate	Input
mcntrl393.mcntrl_ps_pio.clk	status_generate	Input
mcntrl393.memctrl16.status_generate.clk	status_generate	Input
mcntrl393.memctrl16.mcontr_sequencer.clk	status_generate	Input
membridge.clk	status_generate	Input
gpio393.clk	status_generate	Input
event_logger.clk	status_generate	Input
mult_saxi_wr.clk	status_generate	Input
clocks393m.clk	status_generate	Input
debug_master.clk	status_generate	Input
cmd_seq_mux.srst	status_generate	Input
mcntrl393.mcntrl_tiled_rw.srst	status_generate	Input
mcntrl393.mcntrl_ps_pio.srst	status_generate	Input
mcntrl393.memctrl16.status_generate.srst	status_generate	Input
mcntrl393.memctrl16.mcontr_sequencer.srst	status_generate	Input
membridge.srst	status_generate	Input
gpio393.srst	status_generate	Input
event_logger.srst	status_generate	Input
mult_saxi_wr.srst	status_generate	Input
clocks393m.srst	status_generate	Input
debug_master.srst	status_generate	Input
cmd_seq_mux.we	status_generate	Input
mcntrl393.mcntrl_tiled_rw.we	status_generate	Input
mcntrl393.mcntrl_ps_pio.we	status_generate	Input
mcntrl393.memctrl16.status_generate.we	status_generate	Input
mcntrl393.memctrl16.mcontr_sequencer.we	status_generate	Input
membridge.we	status_generate	Input
gpio393.we	status_generate	Input
event_logger.we	status_generate	Input
mult_saxi_wr.we	status_generate	Input
clocks393m.we	status_generate	Input
debug_master.we	status_generate	Input
cmd_seq_mux.wd	status_generate	Input
mcntrl393.mcntrl_tiled_rw.wd	status_generate	Input
mcntrl393.mcntrl_ps_pio.wd	status_generate	Input
mcntrl393.memctrl16.status_generate.wd	status_generate	Input
mcntrl393.memctrl16.mcontr_sequencer.wd	status_generate	Input
membridge.wd	status_generate	Input
gpio393.wd	status_generate	Input
event_logger.wd	status_generate	Input
mult_saxi_wr.wd	status_generate	Input
clocks393m.wd	status_generate	Input
debug_master.wd	status_generate	Input
cmd_seq_mux.status	status_generate	Input
mcntrl393.mcntrl_tiled_rw.status	status_generate	Input
mcntrl393.mcntrl_ps_pio.status	status_generate	Input
mcntrl393.memctrl16.status_generate.status	status_generate	Input
mcntrl393.memctrl16.mcontr_sequencer.status	status_generate	Input
membridge.status	status_generate	Input
gpio393.status	status_generate	Input
event_logger.status	status_generate	Input
mult_saxi_wr.status	status_generate	Input
clocks393m.status	status_generate	Input
debug_master.status	status_generate	Input
cmd_seq_mux.ad	status_generate	Output
mcntrl393.mcntrl_tiled_rw.ad	status_generate	Output
mcntrl393.mcntrl_ps_pio.ad	status_generate	Output
mcntrl393.memctrl16.status_generate.ad	status_generate	Output
mcntrl393.memctrl16.mcontr_sequencer.ad	status_generate	Output
membridge.ad	status_generate	Output
gpio393.ad	status_generate	Output
event_logger.ad	status_generate	Output
mult_saxi_wr.ad	status_generate	Output
clocks393m.ad	status_generate	Output
debug_master.ad	status_generate	Output
cmd_seq_mux.rq	status_generate	Output
mcntrl393.mcntrl_tiled_rw.rq	status_generate	Output
mcntrl393.mcntrl_ps_pio.rq	status_generate	Output
mcntrl393.memctrl16.status_generate.rq	status_generate	Output
mcntrl393.memctrl16.mcontr_sequencer.rq	status_generate	Output
membridge.rq	status_generate	Output
gpio393.rq	status_generate	Output
event_logger.rq	status_generate	Output
mult_saxi_wr.rq	status_generate	Output
clocks393m.rq	status_generate	Output
debug_master.rq	status_generate	Output
cmd_seq_mux.start	status_generate	Input
mcntrl393.mcntrl_tiled_rw.start	status_generate	Input
mcntrl393.mcntrl_ps_pio.start	status_generate	Input
mcntrl393.memctrl16.status_generate.start	status_generate	Input
mcntrl393.memctrl16.mcontr_sequencer.start	status_generate	Input
membridge.start	status_generate	Input
gpio393.start	status_generate	Input
event_logger.start	status_generate	Input
mult_saxi_wr.start	status_generate	Input
clocks393m.start	status_generate	Input
debug_master.start	status_generate	Input
cmd_seq_mux.STATUS_BITS	status_generate	Parameter
mcntrl393.mcntrl_tiled_rw.STATUS_BITS	status_generate	Parameter
mcntrl393.mcntrl_ps_pio.STATUS_BITS	status_generate	Parameter
mcntrl393.memctrl16.status_generate.STATUS_BITS	status_generate	Parameter
mcntrl393.memctrl16.mcontr_sequencer.STATUS_BITS	status_generate	Parameter
membridge.STATUS_BITS	status_generate	Parameter
gpio393.STATUS_BITS	status_generate	Parameter
event_logger.STATUS_BITS	status_generate	Parameter
mult_saxi_wr.STATUS_BITS	status_generate	Parameter
clocks393m.STATUS_BITS	status_generate	Parameter
debug_master.STATUS_BITS	status_generate	Parameter
cmd_seq_mux.ALL_BITS	status_generate	Parameter
mcntrl393.mcntrl_tiled_rw.ALL_BITS	status_generate	Parameter
mcntrl393.mcntrl_ps_pio.ALL_BITS	status_generate	Parameter
mcntrl393.memctrl16.status_generate.ALL_BITS	status_generate	Parameter
mcntrl393.memctrl16.mcontr_sequencer.ALL_BITS	status_generate	Parameter
membridge.ALL_BITS	status_generate	Parameter
gpio393.ALL_BITS	status_generate	Parameter
event_logger.ALL_BITS	status_generate	Parameter
mult_saxi_wr.ALL_BITS	status_generate	Parameter
clocks393m.ALL_BITS	status_generate	Parameter
debug_master.ALL_BITS	status_generate	Parameter
aw_nempty_ready	axibram_write	Signal
STATUS_ADDR	status_read	Parameter
STATUS_ADDR_MASK	status_read	Parameter
AXI_RD_ADDR_BITS	status_read	Parameter
STATUS_DEPTH	status_read	Parameter
FPGA_VERSION	status_read	Parameter
mrst	status_read	Input
arst	status_read	Input
clk	status_read	Input
axi_clk	status_read	Input
axird_pre_araddr	status_read	Input
axird_start_burst	status_read	Input
axird_raddr	status_read	Input
axird_ren	status_read	Input
axird_regen	status_read	Input
axird_rdata	status_read	Output
axird_selected	status_read	Output
ad	status_read	Input
rq	status_read	Input
start	status_read	Output
DATA_2DEPTH	status_read	Parameter
ram	status_read	Signal
waddr	status_read	Signal
we	status_read	Signal
wdata	status_read	Signal
rq_r	status_read	Signal
dstb	status_read	Signal
select_w	status_read	Signal
select_r	status_read	Signal
select_d	status_read	Signal
rd	status_read	Signal
regen	status_read	Signal
axi_status_rdata	status_read	Signal
axi_status_rdata_r	status_read	Signal
status_router16.rst	status_router16	Input
mcntrl393.rst	status_router16	Input
status_router16.clk	status_router16	Input
mcntrl393.clk	status_router16	Input
status_router16.srst	status_router16	Input
mcntrl393.srst	status_router16	Input
status_router16.db_in0	status_router16	Input
mcntrl393.db_in0	status_router16	Input
status_router16.rq_in0	status_router16	Input
mcntrl393.rq_in0	status_router16	Input
status_router16.start_in0	status_router16	Output
mcntrl393.start_in0	status_router16	Output
status_router16.db_in1	status_router16	Input
mcntrl393.db_in1	status_router16	Input
w_nempty_ready	axibram_write	Signal
status_router16.rq_in1	status_router16	Input
mcntrl393.rq_in1	status_router16	Input
status_router16.start_in1	status_router16	Output
mcntrl393.start_in1	status_router16	Output
status_router16.db_in2	status_router16	Input
mcntrl393.db_in2	status_router16	Input
status_router16.rq_in2	status_router16	Input
mcntrl393.rq_in2	status_router16	Input
status_router16.start_in2	status_router16	Output
mcntrl393.start_in2	status_router16	Output
status_router16.db_in3	status_router16	Input
mcntrl393.db_in3	status_router16	Input
status_router16.rq_in3	status_router16	Input
mcntrl393.rq_in3	status_router16	Input
status_router16.start_in3	status_router16	Output
mcntrl393.start_in3	status_router16	Output
status_router16.db_in4	status_router16	Input
mcntrl393.db_in4	status_router16	Input
status_router16.rq_in4	status_router16	Input
mcntrl393.rq_in4	status_router16	Input
status_router16.start_in4	status_router16	Output
mcntrl393.start_in4	status_router16	Output
status_router16.db_in5	status_router16	Input
mcntrl393.db_in5	status_router16	Input
status_router16.rq_in5	status_router16	Input
mcntrl393.rq_in5	status_router16	Input
status_router16.start_in5	status_router16	Output
mcntrl393.start_in5	status_router16	Output
status_router16.db_in6	status_router16	Input
mcntrl393.db_in6	status_router16	Input
status_router16.rq_in6	status_router16	Input
mcntrl393.rq_in6	status_router16	Input
status_router16.start_in6	status_router16	Output
mcntrl393.start_in6	status_router16	Output
status_router16.db_in7	status_router16	Input
mcntrl393.db_in7	status_router16	Input
status_router16.rq_in7	status_router16	Input
mcntrl393.rq_in7	status_router16	Input
status_router16.start_in7	status_router16	Output
mcntrl393.start_in7	status_router16	Output
status_router16.db_in8	status_router16	Input
mcntrl393.db_in8	status_router16	Input
status_router16.rq_in8	status_router16	Input
mcntrl393.rq_in8	status_router16	Input
status_router16.start_in8	status_router16	Output
mcntrl393.start_in8	status_router16	Output
status_router16.db_in9	status_router16	Input
mcntrl393.db_in9	status_router16	Input
status_router16.rq_in9	status_router16	Input
mcntrl393.rq_in9	status_router16	Input
status_router16.start_in9	status_router16	Output
mcntrl393.start_in9	status_router16	Output
status_router16.db_in10	status_router16	Input
mcntrl393.db_in10	status_router16	Input
status_router16.rq_in10	status_router16	Input
mcntrl393.rq_in10	status_router16	Input
status_router16.start_in10	status_router16	Output
mcntrl393.start_in10	status_router16	Output
status_router16.db_in11	status_router16	Input
mcntrl393.db_in11	status_router16	Input
status_router16.rq_in11	status_router16	Input
mcntrl393.rq_in11	status_router16	Input
status_router16.start_in11	status_router16	Output
mcntrl393.start_in11	status_router16	Output
status_router16.db_in12	status_router16	Input
mcntrl393.db_in12	status_router16	Input
status_router16.rq_in12	status_router16	Input
mcntrl393.rq_in12	status_router16	Input
status_router16.start_in12	status_router16	Output
mcntrl393.start_in12	status_router16	Output
status_router16.db_in13	status_router16	Input
mcntrl393.db_in13	status_router16	Input
status_router16.rq_in13	status_router16	Input
mcntrl393.rq_in13	status_router16	Input
status_router16.start_in13	status_router16	Output
mcntrl393.start_in13	status_router16	Output
status_router16.db_in14	status_router16	Input
mcntrl393.db_in14	status_router16	Input
status_router16.rq_in14	status_router16	Input
mcntrl393.rq_in14	status_router16	Input
status_router16.start_in14	status_router16	Output
mcntrl393.start_in14	status_router16	Output
status_router16.db_in15	status_router16	Input
mcntrl393.db_in15	status_router16	Input
status_router16.rq_in15	status_router16	Input
mcntrl393.rq_in15	status_router16	Input
status_router16.start_in15	status_router16	Output
mcntrl393.start_in15	status_router16	Output
status_router16.db_out	status_router16	Output
mcntrl393.db_out	status_router16	Output
status_router16.rq_out	status_router16	Output
mcntrl393.rq_out	status_router16	Output
status_router16.start_out	status_router16	Input
mcntrl393.start_out	status_router16	Input
status_router16.db_int	status_router16	Signal
mcntrl393.db_int	status_router16	Signal
status_router16.rq_int	status_router16	Signal
mcntrl393.rq_int	status_router16	Signal
status_router16.start_int	status_router16	Signal
mcntrl393.start_int	status_router16	Signal
status_router16.FIFO_TYPE	status_router2	Parameter
status_router16.status_router8.status_router2.FIFO_TYPE	status_router2	Parameter
status_router16.status_router8.status_router4.FIFO_TYPE	status_router2	Parameter
mcntrl393.FIFO_TYPE	status_router2	Parameter
sensors393.FIFO_TYPE	status_router2	Parameter
status_router16.rst	status_router2	Input
status_router16.status_router8.status_router2.rst	status_router2	Input
status_router16.status_router8.status_router4.rst	status_router2	Input
mcntrl393.rst	status_router2	Input
sensors393.rst	status_router2	Input
status_router16.clk	status_router2	Input
status_router16.status_router8.status_router2.clk	status_router2	Input
status_router16.status_router8.status_router4.clk	status_router2	Input
mcntrl393.clk	status_router2	Input
sensors393.clk	status_router2	Input
status_router16.srst	status_router2	Input
status_router16.status_router8.status_router2.srst	status_router2	Input
status_router16.status_router8.status_router4.srst	status_router2	Input
mcntrl393.srst	status_router2	Input
sensors393.srst	status_router2	Input
status_router16.db_in0	status_router2	Input
status_router16.status_router8.status_router2.db_in0	status_router2	Input
status_router16.status_router8.status_router4.db_in0	status_router2	Input
mcntrl393.db_in0	status_router2	Input
sensors393.db_in0	status_router2	Input
status_router16.rq_in0	status_router2	Input
status_router16.status_router8.status_router2.rq_in0	status_router2	Input
status_router16.status_router8.status_router4.rq_in0	status_router2	Input
mcntrl393.rq_in0	status_router2	Input
sensors393.rq_in0	status_router2	Input
status_router16.start_in0	status_router2	Output
status_router16.status_router8.status_router2.start_in0	status_router2	Output
status_router16.status_router8.status_router4.start_in0	status_router2	Output
mcntrl393.start_in0	status_router2	Output
sensors393.start_in0	status_router2	Output
status_router16.db_in1	status_router2	Input
status_router16.status_router8.status_router2.db_in1	status_router2	Input
status_router16.status_router8.status_router4.db_in1	status_router2	Input
mcntrl393.db_in1	status_router2	Input
sensors393.db_in1	status_router2	Input
status_router16.rq_in1	status_router2	Input
status_router16.status_router8.status_router2.rq_in1	status_router2	Input
status_router16.status_router8.status_router4.rq_in1	status_router2	Input
mcntrl393.rq_in1	status_router2	Input
sensors393.rq_in1	status_router2	Input
status_router16.start_in1	status_router2	Output
status_router16.status_router8.status_router2.start_in1	status_router2	Output
status_router16.status_router8.status_router4.start_in1	status_router2	Output
mcntrl393.start_in1	status_router2	Output
sensors393.start_in1	status_router2	Output
status_router16.db_out	status_router2	Output
status_router16.status_router8.status_router2.db_out	status_router2	Output
status_router16.status_router8.status_router4.db_out	status_router2	Output
mcntrl393.db_out	status_router2	Output
sensors393.db_out	status_router2	Output
status_router16.rq_out	status_router2	Output
status_router16.status_router8.status_router2.rq_out	status_router2	Output
status_router16.status_router8.status_router4.rq_out	status_router2	Output
mcntrl393.rq_out	status_router2	Output
sensors393.rq_out	status_router2	Output
status_router16.start_out	status_router2	Input
status_router16.status_router8.status_router2.start_out	status_router2	Input
status_router16.status_router8.status_router4.start_out	status_router2	Input
mcntrl393.start_out	status_router2	Input
sensors393.start_out	status_router2	Input
status_router16.rq_in	status_router2	Signal
status_router16.status_router8.status_router2.rq_in	status_router2	Signal
status_router16.status_router8.status_router4.rq_in	status_router2	Signal
mcntrl393.rq_in	status_router2	Signal
sensors393.rq_in	status_router2	Signal
status_router16.start_rcv	status_router2	Signal
status_router16.status_router8.status_router2.start_rcv	status_router2	Signal
status_router16.status_router8.status_router4.start_rcv	status_router2	Signal
mcntrl393.start_rcv	status_router2	Signal
sensors393.start_rcv	status_router2	Signal
status_router16.rcv_rest_r	status_router2	Signal
status_router16.status_router8.status_router2.rcv_rest_r	status_router2	Signal
status_router16.status_router8.status_router4.rcv_rest_r	status_router2	Signal
mcntrl393.rcv_rest_r	status_router2	Signal
sensors393.rcv_rest_r	status_router2	Signal
status_router16.fifo_half_full	status_router2	Signal
status_router16.status_router8.status_router2.fifo_half_full	status_router2	Signal
status_router16.status_router8.status_router4.fifo_half_full	status_router2	Signal
mcntrl393.fifo_half_full	status_router2	Signal
sensors393.fifo_half_full	status_router2	Signal
status_router16.fifo0_out	status_router2	Signal
status_router16.status_router8.status_router2.fifo0_out	status_router2	Signal
status_router16.status_router8.status_router4.fifo0_out	status_router2	Signal
mcntrl393.fifo0_out	status_router2	Signal
sensors393.fifo0_out	status_router2	Signal
status_router16.fifo1_out	status_router2	Signal
status_router16.status_router8.status_router2.fifo1_out	status_router2	Signal
status_router16.status_router8.status_router4.fifo1_out	status_router2	Signal
mcntrl393.fifo1_out	status_router2	Signal
sensors393.fifo1_out	status_router2	Signal
status_router16.fifo_last_byte	status_router2	Signal
status_router16.status_router8.status_router2.fifo_last_byte	status_router2	Signal
status_router16.status_router8.status_router4.fifo_last_byte	status_router2	Signal
mcntrl393.fifo_last_byte	status_router2	Signal
sensors393.fifo_last_byte	status_router2	Signal
status_router16.fifo_nempty_pre	status_router2	Signal
status_router16.status_router8.status_router2.fifo_nempty_pre	status_router2	Signal
status_router16.status_router8.status_router4.fifo_nempty_pre	status_router2	Signal
mcntrl393.fifo_nempty_pre	status_router2	Signal
sensors393.fifo_nempty_pre	status_router2	Signal
status_router16.fifo_nempty	status_router2	Signal
status_router16.status_router8.status_router2.fifo_nempty	status_router2	Signal
status_router16.status_router8.status_router4.fifo_nempty	status_router2	Signal
mcntrl393.fifo_nempty	status_router2	Signal
sensors393.fifo_nempty	status_router2	Signal
status_router16.fifo_re	status_router2	Signal
status_router16.status_router8.status_router2.fifo_re	status_router2	Signal
status_router16.status_router8.status_router4.fifo_re	status_router2	Signal
mcntrl393.fifo_re	status_router2	Signal
sensors393.fifo_re	status_router2	Signal
status_router16.next_chn	status_router2	Signal
status_router16.status_router8.status_router2.next_chn	status_router2	Signal
status_router16.status_router8.status_router4.next_chn	status_router2	Signal
mcntrl393.next_chn	status_router2	Signal
sensors393.next_chn	status_router2	Signal
status_router16.current_chn_r	status_router2	Signal
status_router16.status_router8.status_router2.current_chn_r	status_router2	Signal
status_router16.status_router8.status_router4.current_chn_r	status_router2	Signal
mcntrl393.current_chn_r	status_router2	Signal
sensors393.current_chn_r	status_router2	Signal
status_router16.snd_rest_r	status_router2	Signal
status_router16.status_router8.status_router2.snd_rest_r	status_router2	Signal
status_router16.status_router8.status_router4.snd_rest_r	status_router2	Signal
mcntrl393.snd_rest_r	status_router2	Signal
sensors393.snd_rest_r	status_router2	Signal
status_router16.snd_pre_start	status_router2	Signal
status_router16.status_router8.status_router2.snd_pre_start	status_router2	Signal
status_router16.status_router8.status_router4.snd_pre_start	status_router2	Signal
mcntrl393.snd_pre_start	status_router2	Signal
sensors393.snd_pre_start	status_router2	Signal
status_router16.snd_last_byte	status_router2	Signal
status_router16.status_router8.status_router2.snd_last_byte	status_router2	Signal
status_router16.status_router8.status_router4.snd_last_byte	status_router2	Signal
mcntrl393.snd_last_byte	status_router2	Signal
sensors393.snd_last_byte	status_router2	Signal
status_router16.chn_sel_w	status_router2	Signal
status_router16.status_router8.status_router2.chn_sel_w	status_router2	Signal
status_router16.status_router8.status_router4.chn_sel_w	status_router2	Signal
mcntrl393.chn_sel_w	status_router2	Signal
sensors393.chn_sel_w	status_router2	Signal
status_router16.early_chn	status_router2	Signal
status_router16.status_router8.status_router2.early_chn	status_router2	Signal
status_router16.status_router8.status_router4.early_chn	status_router2	Signal
mcntrl393.early_chn	status_router2	Signal
sensors393.early_chn	status_router2	Signal
status_router16.set_other_only_w	status_router2	Signal
status_router16.status_router8.status_router2.set_other_only_w	status_router2	Signal
status_router16.status_router8.status_router4.set_other_only_w	status_router2	Signal
mcntrl393.set_other_only_w	status_router2	Signal
sensors393.set_other_only_w	status_router2	Signal
rst	status_router4	Input
clk	status_router4	Input
srst	status_router4	Input
db_in0	status_router4	Input
rq_in0	status_router4	Input
start_in0	status_router4	Output
db_in1	status_router4	Input
rq_in1	status_router4	Input
start_in1	status_router4	Output
db_in2	status_router4	Input
rq_in2	status_router4	Input
start_in2	status_router4	Output
db_in3	status_router4	Input
rq_in3	status_router4	Input
start_in3	status_router4	Output
db_out	status_router4	Output
rq_out	status_router4	Output
start_out	status_router4	Input
db_int	status_router4	Signal
dev_ready_r	axibram_write	Signal
rdata	axibram_read	Output
rq_int	status_router4	Signal
start_int	status_router4	Signal
rst	status_router8	Input
clk	status_router8	Input
srst	status_router8	Input
db_in0	status_router8	Input
rq_in0	status_router8	Input
start_in0	status_router8	Output
db_in1	status_router8	Input
rq_in1	status_router8	Input
start_in1	status_router8	Output
db_in2	status_router8	Input
rq_in2	status_router8	Input
start_in2	status_router8	Output
db_in3	status_router8	Input
rq_in3	status_router8	Input
start_in3	status_router8	Output
db_in4	status_router8	Input
rq_in4	status_router8	Input
start_in4	status_router8	Output
db_in5	status_router8	Input
rq_in5	status_router8	Input
start_in5	status_router8	Output
db_in6	status_router8	Input
rq_in6	status_router8	Input
start_in6	status_router8	Output
db_in7	status_router8	Input
rq_in7	status_router8	Input
start_in7	status_router8	Output
db_out	status_router8	Output
rq_out	status_router8	Output
start_out	status_router8	Input
db_int	status_router8	Signal
rq_int	status_router8	Signal
start_int	status_router8	Signal
WIDTH	sync_resets	Parameter
REGISTER	sync_resets	Parameter
arst	sync_resets	Input
locked	sync_resets	Input
clk	sync_resets	Input
rst	sync_resets	Output
en_locked	sync_resets	Signal
rst_w	sync_resets	Signal
rst_early_master_w	sync_resets	Signal
rst_early_master	sync_resets	Signal
mrst	sync_resets	Signal
bresp_in	axibram_write	Signal
was_bresp_re	axibram_write	Signal
CAPACITANCE	ibuf_ibufg	Parameter
IBUF_DELAY_VALUE	ibuf_ibufg	Parameter
IBUF_LOW_PWR	ibuf_ibufg	Parameter
IFD_DELAY_VALUE	ibuf_ibufg	Parameter
IOSTANDARD	ibuf_ibufg	Parameter
O	ibuf_ibufg	Output
I	ibuf_ibufg	Input
CAPACITANCE	ibufds_ibufgds	Parameter
DIFF_TERM	ibufds_ibufgds	Parameter
DQS_BIAS	ibufds_ibufgds	Parameter
IBUF_DELAY_VALUE	ibufds_ibufgds	Parameter
IBUF_LOW_PWR	ibufds_ibufgds	Parameter
IFD_DELAY_VALUE	ibufds_ibufgds	Parameter
IOSTANDARD	ibufds_ibufgds	Parameter
O	ibufds_ibufgds	Output
I	ibufds_ibufgds	Input
IB	ibufds_ibufgds	Input
IODELAY_GRP	idelay_ctrl	Parameter
refclk	idelay_ctrl	Input
rst	idelay_ctrl	Input
rdy	idelay_ctrl	Output
DRIVE	iobuf	Parameter
IBUF_LOW_PWR	iobuf	Parameter
IOSTANDARD	iobuf	Parameter
SLEW	iobuf	Parameter
O	iobuf	Output
IO	iobuf	Inout
I	iobuf	Input
T	iobuf	Input
bresp_re	axibram_write	Signal
CLKIN_PERIOD	pll_base	Parameter
BANDWIDTH	pll_base	Parameter
CLKFBOUT_MULT	pll_base	Parameter
CLKFBOUT_PHASE	pll_base	Parameter
CLKOUT0_PHASE	pll_base	Parameter
CLKOUT1_PHASE	pll_base	Parameter
CLKOUT2_PHASE	pll_base	Parameter
CLKOUT3_PHASE	pll_base	Parameter
CLKOUT4_PHASE	pll_base	Parameter
CLKOUT5_PHASE	pll_base	Parameter
CLKOUT0_DUTY_CYCLE	pll_base	Parameter
CLKOUT1_DUTY_CYCLE	pll_base	Parameter
CLKOUT2_DUTY_CYCLE	pll_base	Parameter
CLKOUT3_DUTY_CYCLE	pll_base	Parameter
CLKOUT4_DUTY_CYCLE	pll_base	Parameter
CLKOUT5_DUTY_CYCLE	pll_base	Parameter
CLKOUT0_DIVIDE	pll_base	Parameter
CLKOUT1_DIVIDE	pll_base	Parameter
CLKOUT2_DIVIDE	pll_base	Parameter
CLKOUT3_DIVIDE	pll_base	Parameter
CLKOUT4_DIVIDE	pll_base	Parameter
CLKOUT5_DIVIDE	pll_base	Parameter
DIVCLK_DIVIDE	pll_base	Parameter
REF_JITTER1	pll_base	Parameter
STARTUP_WAIT	pll_base	Parameter
clkin	pll_base	Input
clkfbin	pll_base	Input
rst	pll_base	Input
pwrdwn	pll_base	Input
clkout0	pll_base	Output
clkout1	pll_base	Output
clkout2	pll_base	Output
clkout3	pll_base	Output
clkout4	pll_base	Output
clkout5	pll_base	Output
clkfbout	pll_base	Output
locked	pll_base	Output
mult_saxi_wr_inbuf.REGISTERS	ram18_var_w_var_r	Parameter
mult_saxi_wr.REGISTERS	ram18_var_w_var_r	Parameter
mult_saxi_wr_inbuf.LOG2WIDTH_WR	ram18_var_w_var_r	Parameter
mult_saxi_wr.LOG2WIDTH_WR	ram18_var_w_var_r	Parameter
mult_saxi_wr_inbuf.LOG2WIDTH_RD	ram18_var_w_var_r	Parameter
mult_saxi_wr.LOG2WIDTH_RD	ram18_var_w_var_r	Parameter
mult_saxi_wr_inbuf.11587	ram18_var_w_var_r	Parameter
mult_saxi_wr.11587	ram18_var_w_var_r	Parameter
mult_saxi_wr_inbuf.rclk	ram18_var_w_var_r	Input
mult_saxi_wr.rclk	ram18_var_w_var_r	Input
mult_saxi_wr_inbuf.raddr	ram18_var_w_var_r	Input
mult_saxi_wr.raddr	ram18_var_w_var_r	Input
mult_saxi_wr_inbuf.ren	ram18_var_w_var_r	Input
mult_saxi_wr.ren	ram18_var_w_var_r	Input
mult_saxi_wr_inbuf.regen	ram18_var_w_var_r	Input
mult_saxi_wr.regen	ram18_var_w_var_r	Input
mult_saxi_wr_inbuf.data_out	ram18_var_w_var_r	Output
mult_saxi_wr.data_out	ram18_var_w_var_r	Output
mult_saxi_wr_inbuf.wclk	ram18_var_w_var_r	Input
mult_saxi_wr.wclk	ram18_var_w_var_r	Input
mult_saxi_wr_inbuf.waddr	ram18_var_w_var_r	Input
mult_saxi_wr.waddr	ram18_var_w_var_r	Input
mult_saxi_wr_inbuf.we	ram18_var_w_var_r	Input
mult_saxi_wr.we	ram18_var_w_var_r	Input
mult_saxi_wr_inbuf.web	ram18_var_w_var_r	Input
mult_saxi_wr.web	ram18_var_w_var_r	Input
mult_saxi_wr_inbuf.data_in	ram18_var_w_var_r	Input
mult_saxi_wr.data_in	ram18_var_w_var_r	Input
REGISTERS	ram18p_var_w_var_r	Parameter
LOG2WIDTH_WR	ram18p_var_w_var_r	Parameter
LOG2WIDTH_RD	ram18p_var_w_var_r	Parameter
11669	ram18p_var_w_var_r	Parameter
rclk	ram18p_var_w_var_r	Input
raddr	ram18p_var_w_var_r	Input
ren	ram18p_var_w_var_r	Input
regen	ram18p_var_w_var_r	Input
data_out	ram18p_var_w_var_r	Output
wclk	ram18p_var_w_var_r	Input
waddr	ram18p_var_w_var_r	Input
we	ram18p_var_w_var_r	Input
web	ram18p_var_w_var_r	Input
data_in	ram18p_var_w_var_r	Input
mcntrl393.REGISTERS	ram_var_w_var_r	Parameter
mcntrl393.mcntrl_ps_pio.REGISTERS	ram_var_w_var_r	Parameter
membridge.REGISTERS	ram_var_w_var_r	Parameter
sensors393.REGISTERS	ram_var_w_var_r	Parameter
mult_saxi_wr_inbuf.REGISTERS	ram_var_w_var_r	Parameter
mult_saxi_wr.REGISTERS	ram_var_w_var_r	Parameter
mcntrl393.LOG2WIDTH_WR	ram_var_w_var_r	Parameter
mcntrl393.mcntrl_ps_pio.LOG2WIDTH_WR	ram_var_w_var_r	Parameter
membridge.LOG2WIDTH_WR	ram_var_w_var_r	Parameter
sensors393.LOG2WIDTH_WR	ram_var_w_var_r	Parameter
mult_saxi_wr_inbuf.LOG2WIDTH_WR	ram_var_w_var_r	Parameter
mult_saxi_wr.LOG2WIDTH_WR	ram_var_w_var_r	Parameter
mcntrl393.LOG2WIDTH_RD	ram_var_w_var_r	Parameter
mcntrl393.mcntrl_ps_pio.LOG2WIDTH_RD	ram_var_w_var_r	Parameter
membridge.LOG2WIDTH_RD	ram_var_w_var_r	Parameter
sensors393.LOG2WIDTH_RD	ram_var_w_var_r	Parameter
mult_saxi_wr_inbuf.LOG2WIDTH_RD	ram_var_w_var_r	Parameter
mult_saxi_wr.LOG2WIDTH_RD	ram_var_w_var_r	Parameter
mcntrl393.11862	ram_var_w_var_r	Parameter
mcntrl393.mcntrl_ps_pio.11862	ram_var_w_var_r	Parameter
membridge.11862	ram_var_w_var_r	Parameter
sensors393.11862	ram_var_w_var_r	Parameter
mult_saxi_wr_inbuf.11862	ram_var_w_var_r	Parameter
mult_saxi_wr.11862	ram_var_w_var_r	Parameter
mcntrl393.rclk	ram_var_w_var_r	Input
mcntrl393.mcntrl_ps_pio.rclk	ram_var_w_var_r	Input
membridge.rclk	ram_var_w_var_r	Input
sensors393.rclk	ram_var_w_var_r	Input
mult_saxi_wr_inbuf.rclk	ram_var_w_var_r	Input
mult_saxi_wr.rclk	ram_var_w_var_r	Input
mcntrl393.raddr	ram_var_w_var_r	Input
mcntrl393.mcntrl_ps_pio.raddr	ram_var_w_var_r	Input
membridge.raddr	ram_var_w_var_r	Input
sensors393.raddr	ram_var_w_var_r	Input
mult_saxi_wr_inbuf.raddr	ram_var_w_var_r	Input
mult_saxi_wr.raddr	ram_var_w_var_r	Input
mcntrl393.ren	ram_var_w_var_r	Input
mcntrl393.mcntrl_ps_pio.ren	ram_var_w_var_r	Input
membridge.ren	ram_var_w_var_r	Input
sensors393.ren	ram_var_w_var_r	Input
mult_saxi_wr_inbuf.ren	ram_var_w_var_r	Input
mult_saxi_wr.ren	ram_var_w_var_r	Input
mcntrl393.regen	ram_var_w_var_r	Input
mcntrl393.mcntrl_ps_pio.regen	ram_var_w_var_r	Input
membridge.regen	ram_var_w_var_r	Input
sensors393.regen	ram_var_w_var_r	Input
mult_saxi_wr_inbuf.regen	ram_var_w_var_r	Input
mult_saxi_wr.regen	ram_var_w_var_r	Input
mcntrl393.data_out	ram_var_w_var_r	Output
mcntrl393.mcntrl_ps_pio.data_out	ram_var_w_var_r	Output
membridge.data_out	ram_var_w_var_r	Output
sensors393.data_out	ram_var_w_var_r	Output
mult_saxi_wr_inbuf.data_out	ram_var_w_var_r	Output
mult_saxi_wr.data_out	ram_var_w_var_r	Output
mcntrl393.wclk	ram_var_w_var_r	Input
mcntrl393.mcntrl_ps_pio.wclk	ram_var_w_var_r	Input
membridge.wclk	ram_var_w_var_r	Input
sensors393.wclk	ram_var_w_var_r	Input
mult_saxi_wr_inbuf.wclk	ram_var_w_var_r	Input
mult_saxi_wr.wclk	ram_var_w_var_r	Input
mcntrl393.waddr	ram_var_w_var_r	Input
mcntrl393.mcntrl_ps_pio.waddr	ram_var_w_var_r	Input
membridge.waddr	ram_var_w_var_r	Input
sensors393.waddr	ram_var_w_var_r	Input
mult_saxi_wr_inbuf.waddr	ram_var_w_var_r	Input
mult_saxi_wr.waddr	ram_var_w_var_r	Input
mcntrl393.we	ram_var_w_var_r	Input
mcntrl393.mcntrl_ps_pio.we	ram_var_w_var_r	Input
membridge.we	ram_var_w_var_r	Input
sensors393.we	ram_var_w_var_r	Input
mult_saxi_wr_inbuf.we	ram_var_w_var_r	Input
mult_saxi_wr.we	ram_var_w_var_r	Input
mcntrl393.web	ram_var_w_var_r	Input
mcntrl393.mcntrl_ps_pio.web	ram_var_w_var_r	Input
membridge.web	ram_var_w_var_r	Input
sensors393.web	ram_var_w_var_r	Input
mult_saxi_wr_inbuf.web	ram_var_w_var_r	Input
mult_saxi_wr.web	ram_var_w_var_r	Input
mcntrl393.data_in	ram_var_w_var_r	Input
mcntrl393.mcntrl_ps_pio.data_in	ram_var_w_var_r	Input
membridge.data_in	ram_var_w_var_r	Input
sensors393.data_in	ram_var_w_var_r	Input
mult_saxi_wr_inbuf.data_in	ram_var_w_var_r	Input
mult_saxi_wr.data_in	ram_var_w_var_r	Input
rvalid	axibram_read	Output
sns1_dp	x393
sns1_dn	x393
sns1_dp74	x393
sns1_dn74	x393
sns1_clkp	x393
sns1_clkn	x393
sns1_scl	x393
sns1_sda	x393
sns1_ctl	x393
sns1_pg	x393
sns2_dp	x393
sns2_dn	x393
sns2_dp74	x393
sns2_dn74	x393
sns2_clkp	x393
sns2_clkn	x393
sns2_scl	x393
sns2_sda	x393
sns2_ctl	x393
sns2_pg	x393
sns3_dp	x393
sns3_dn	x393
sns3_dp74	x393
sns3_dn74	x393
sns3_clkp	x393
sns3_clkn	x393
sns3_scl	x393
sns3_sda	x393
sns3_ctl	x393
sns3_pg	x393
sns4_dp	x393
sns4_dn	x393
sns4_dp74	x393
sns4_dn74	x393
sns4_clkp	x393
sns4_clkn	x393
sns4_scl	x393
sns4_sda	x393
sns4_ctl	x393
sns4_pg	x393
gpio_pins	x393
SDRST	x393
SDCLK	x393
SDNCLK	x393
SDA	x393
SDBA	x393
SDWE	x393
SDRAS	x393
SDCAS	x393
SDCKE	x393
SDODT	x393
SDD	x393
SDDML	x393
DQSL	x393
NDQSL	x393
SDDMU	x393
DQSU	x393
NDQSU	x393
memclk	x393
ffclk0p	x393
ffclk0n	x393
ffclk1p	x393
ffclk1n	x393
RXN	x393
RXP	x393
TXN	x393
TXP	x393
EXTCLK_P	x393
EXTCLK_N	x393
fclk	x393
frst	x393
axi_aclk	x393
axi_grst	x393
maxi0_awaddr	x393
maxi0_awvalid	x393
maxi0_awready	x393
maxi0_awid	x393
maxi0_awlen	x393
maxi0_awsize	x393
maxi0_awburst	x393
maxi0_wdata	x393
maxi0_wvalid	x393
maxi0_wready	x393
maxi0_wid	x393
maxi0_wlast	x393
maxi0_wstb	x393
maxi0_bvalid	x393
maxi0_bready	x393
maxi0_bid	x393
maxi0_bresp	x393
axiwr_pre_awaddr	x393
axiwr_start_burst	x393
axiwr_dev_ready	x393
axiwr_wclk	x393
axiwr_waddr	x393
axiwr_wen	x393
axiwr_bram_wstb	x393
axiwr_wdata	x393
maxi0_araddr	x393
maxi0_arvalid	x393
maxi0_arready	x393
maxi0_arid	x393
maxi0_arlen	x393
maxi0_arsize	x393
maxi0_arburst	x393
maxi0_rdata	x393
maxi0_rvalid	x393
maxi0_rready	x393
maxi0_rid	x393
maxi0_rlast	x393
maxi0_rresp	x393
axird_pre_araddr	x393
axird_start_burst	x393
axird_dev_ready	x393
axird_bram_rclk	x393
axird_raddr	x393
axird_ren	x393
axird_regen	x393
axird_rdata	x393
status_rdata	x393
status_selected	x393
readback_rdata	x393
readback_selected	x393
mcntrl_axird_rdata	x393
mcntrl_axird_selected	x393
status_selected_ren	x393
readback_selected_ren	x393
mcntrl_axird_selected_ren	x393
status_selected_regen	x393
readback_selected_regen	x393
mcntrl_axird_selected_regen	x393
mclk	x393
mcntrl_locked	x393
ref_clk	x393
hclk	x393
pclk	x393
xclk	x393
camsync_clk	x393
logger_clk	x393
mrst	x393
prst	x393
xrst	x393
crst	x393
lrst	x393
arst	x393
hrst	x393
locked_sync_clk	x393
locked_xclk	x393
locked_pclk	x393
locked_hclk	x393
idelay_ctrl_reset	x393
time_ref	x393
tmp_debug	x393
axiwr_dev_busy	x393
axird_dev_busy	x393
cseq_waddr	x393
cseq_wr_en	x393
cseq_wdata	x393
cseq_ackn	x393
frseq_waddr	x393
frseq_valid	x393
frseq_wdata	x393
frseq_ackn	x393
frseq_is	x393
frseq_im	x393
frseq_irq	x393
par_waddr	x393
par_data	x393
cmd_root_ad	x393
cmd_root_stb	x393
status_root_ad	x393
status_root_rq	x393
status_root_start	x393
status_mcontr_ad	x393
status_mcontr_rq	x393
status_mcontr_start	x393
status_membridge_ad	x393
status_membridge_rq	x393
status_membridge_start	x393
status_test01_ad	x393
status_test01_rq	x393
status_test01_start	x393
status_sensor_ad	x393
status_sensor_rq	x393
status_sensor_start	x393
status_compressor_ad	x393
status_compressor_rq	x393
status_compressor_start	x393
status_sequencer_ad	x393
status_sequencer_rq	x393
status_sequencer_start	x393
status_logger_ad	x393
status_logger_rq	x393
status_logger_start	x393
status_timing_ad	x393
status_timing_rq	x393
status_timing_start	x393
status_gpio_ad	x393
status_gpio_rq	x393
status_gpio_start	x393
status_saxi1wr_ad	x393
status_saxi1wr_rq	x393
status_saxi1wr_start	x393
status_clocks_ad	x393
status_clocks_rq	x393
status_clocks_start	x393
status_debug_ad	x393
status_debug_rq	x393
status_debug_start	x393
DEBUG_RING_LENGTH	x393
debug_ring	x393
debug_sl	x393
cmd_mcontr_ad	x393
cmd_mcontr_stb	x393
cmd_test01_ad	x393
cmd_test01_stb	x393
cmd_membridge_ad	x393
cmd_membridge_stb	x393
cmd_sensor_ad	x393
cmd_sensor_stb	x393
cmd_compressor_ad	x393
cmd_compressor_stb	x393
cmd_sequencer_ad	x393
cmd_sequencer_stb	x393
cmd_logger_ad	x393
cmd_logger_stb	x393
cmd_timing_ad	x393
cmd_timing_stb	x393
cmd_gpio_ad	x393
cmd_gpio_stb	x393
cmd_saxi1wr_ad	x393
cmd_saxi1wr_stb	x393
cmd_clocks_ad	x393
cmd_clocks_stb	x393
cmd_debug_ad	x393
cmd_debug_stb	x393
frame_start_chn1	x393
next_page_chn1	x393
cmd_wrmem_chn1	x393
page_ready_chn1	x393
frame_done_chn1	x393
line_unfinished_chn1	x393
suspend_chn1	x393
xfer_reset_page1_rd	x393
buf_wpage_nxt_chn1	x393
buf_wr_chn1	x393
buf_wdata_chn1	x393
xfer_reset_page1_wr	x393
rpage_nxt_chn1	x393
buf_rd_chn1	x393
buf_rdata_chn1	x393
frame_start_chn2	x393
next_page_chn2	x393
page_ready_chn2	x393
frame_done_chn2	x393
line_unfinished_chn2	x393
suspend_chn2	x393
frame_start_chn3	x393
next_page_chn3	x393
page_ready_chn3	x393
frame_done_chn3	x393
line_unfinished_chn3	x393
suspend_chn3	x393
frame_start_chn4	x393
next_page_chn4	x393
page_ready_chn4	x393
frame_done_chn4	x393
line_unfinished_chn4	x393
suspend_chn4	x393
axi_rst_pre	x393
comb_rst	x393
gpio_in	x393
sens_rpage_set	x393
sens_frame_run	x393
sens_rpage_next	x393
sens_buf_rd	x393
sens_buf_dout	x393
sens_page_written	x393
sens_xfer_skipped	x393
sens_first_wr_in_frame	x393
trigger_mode	x393
trig_in	x393
sof_out_pclk	x393
eof_out_pclk	x393
sof_out_mclk	x393
sof_late_mclk	x393
frame_num	x393
frame_num_compressed	x393
cmprs_xfer_reset_page_rd	x393
cmprs_buf_wpage_nxt	x393
cmprs_buf_we	x393
cmprs_buf_din	x393
cmprs_page_ready	x393
cmprs_next_page	x393
cmprs_frame_start_dst	x393
cmprs_line_unfinished_src	x393
cmprs_frame_number_src	x393
cmprs_frame_done_src	x393
cmprs_line_unfinished_dst	x393
cmprs_frame_number_dst	x393
cmprs_frame_done_dst	x393
cmprs_suspend	x393
cmprs_frame_number_finished	x393
ts_pre_stb	x393
ts_data	x393
ts_pre_logger_stb	x393
ts_logegr_data	x393
eof_written_mclk	x393
stuffer_done_mclk	x393
cmprs_irq	x393
gpio_rd	x393
gpio_camsync	x393
gpio_camsync_en	x393
gpio_db	x393
gpio_db_en	x393
gpio_logger	x393
gpio_logger_en	x393
logger_snap	x393
logger_out	x393
logger_stb	x393
logger_saxi_en	x393
logger_has_burst	x393
logger_read_burst	x393
logger_data32	x393
logger_pre_valid_chn	x393
idelay_ctrl_rdy	x393
maxi1_araddr	x393
maxi1_arvalid	x393
maxi1_arready	x393
maxi1_arid	x393
maxi1_arlen	x393
maxi1_arsize	x393
maxi1_arburst	x393
maxi1_rdata	x393
maxi1_rvalid	x393
maxi1_rready	x393
maxi1_rid	x393
maxi1_rlast	x393
maxi1_rresp	x393
maxi1_awaddr	x393
maxi1_awvalid	x393
maxi1_awready	x393
maxi1_awid	x393
maxi1_awlen	x393
maxi1_awsize	x393
maxi1_awburst	x393
maxi1_wdata	x393
maxi1_wvalid	x393
maxi1_wready	x393
maxi1_wid	x393
maxi1_wlast	x393
maxi1_wstb	x393
maxi1_bvalid	x393
maxi1_bready	x393
maxi1_bid	x393
maxi1_bresp	x393
afi3_awaddr	x393
afi3_awvalid	x393
afi3_awready	x393
afi3_awid	x393
afi3_awlock	x393
afi3_awcache	x393
afi3_awprot	x393
afi3_awlen	x393
afi3_awsize	x393
afi3_awburst	x393
afi3_awqos	x393
afi3_wdata	x393
afi3_wvalid	x393
afi3_wready	x393
afi3_wid	x393
afi3_wlast	x393
afi3_wstrb	x393
afi3_bvalid	x393
afi3_bready	x393
afi3_bid	x393
afi3_bresp	x393
afi3_wcount	x393
afi3_wacount	x393
afi3_wrissuecap1en	x393
afi3_araddr	x393
afi3_arvalid	x393
afi3_arready	x393
afi3_arid	x393
afi3_arlock	x393
afi3_arcache	x393
afi3_arprot	x393
afi3_arlen	x393
afi3_arsize	x393
afi3_arburst	x393
afi3_arqos	x393
afi3_rdata	x393
afi3_rvalid	x393
afi3_rready	x393
afi3_rid	x393
afi3_rlast	x393
afi3_rresp	x393
afi3_rcount	x393
afi3_racount	x393
afi3_rdissuecap1en	x393
sata_irq	x393
sata_clk	x393
afi0_awaddr	x393
afi0_awvalid	x393
afi0_awready	x393
afi0_awid	x393
afi0_awlock	x393
afi0_awcache	x393
afi0_awprot	x393
afi0_awlen	x393
afi0_awsize	x393
afi0_awburst	x393
afi0_awqos	x393
afi0_wdata	x393
afi0_wvalid	x393
afi0_wready	x393
afi0_wid	x393
afi0_wlast	x393
afi0_wstrb	x393
afi0_bvalid	x393
afi0_bready	x393
afi0_bid	x393
afi0_bresp	x393
afi0_wcount	x393
afi0_wacount	x393
afi0_wrissuecap1en	x393
afi0_araddr	x393
afi0_arvalid	x393
afi0_arready	x393
afi0_arid	x393
afi0_arlock	x393
afi0_arcache	x393
afi0_arprot	x393
afi0_arlen	x393
afi0_arsize	x393
afi0_arburst	x393
afi0_arqos	x393
afi0_rdata	x393
afi0_rvalid	x393
afi0_rready	x393
afi0_rid	x393
afi0_rlast	x393
afi0_rresp	x393
afi0_rcount	x393
afi0_racount	x393
afi0_rdissuecap1en	x393
saxi0_aclk	x393
saxi0_awaddr	x393
saxi0_awvalid	x393
saxi0_awready	x393
saxi0_awid	x393
saxi0_awlock	x393
saxi0_awcache	x393
saxi0_awprot	x393
saxi0_awlen	x393
saxi0_awsize	x393
saxi0_awburst	x393
saxi0_awqos	x393
saxi0_wdata	x393
saxi0_wvalid	x393
saxi0_wready	x393
saxi0_wid	x393
saxi0_wlast	x393
saxi0_wstrb	x393
saxi0_bvalid	x393
saxi0_bready	x393
saxi0_bid	x393
saxi0_bresp	x393
saxi1_aclk	x393
saxi1_awaddr	x393
saxi1_awvalid	x393
saxi1_awready	x393
saxi1_awid	x393
saxi1_awlock	x393
saxi1_awcache	x393
saxi1_awprot	x393
saxi1_awlen	x393
saxi1_awsize	x393
saxi1_awburst	x393
saxi1_awqos	x393
saxi1_wdata	x393
saxi1_wvalid	x393
saxi1_wready	x393
saxi1_wid	x393
saxi1_wlast	x393
saxi1_wstrb	x393
saxi1_bvalid	x393
saxi1_bready	x393
saxi1_bid	x393
saxi1_bresp	x393
afi1_awaddr	x393
afi1_awvalid	x393
afi1_awready	x393
afi1_awid	x393
afi1_awlock	x393
afi1_awcache	x393
afi1_awprot	x393
afi1_awlen	x393
afi1_awsize	x393
afi1_awburst	x393
afi1_awqos	x393
afi1_wdata	x393
afi1_wvalid	x393
afi1_wready	x393
afi1_wid	x393
afi1_wlast	x393
afi1_wstrb	x393
afi1_bvalid	x393
afi1_bready	x393
afi1_bid	x393
afi1_bresp	x393
afi1_wcount	x393
afi1_wacount	x393
afi1_wrissuecap1en	x393
afi1_clk	x393
afi2_awaddr	x393
afi2_awvalid	x393
afi2_awready	x393
afi2_awid	x393
afi2_awlock	x393
afi2_awcache	x393
afi2_awprot	x393
afi2_awlen	x393
afi2_awsize	x393
afi2_awburst	x393
afi2_awqos	x393
afi2_wdata	x393
afi2_wvalid	x393
afi2_wready	x393
afi2_wid	x393
afi2_wlast	x393
afi2_wstrb	x393
afi2_bvalid	x393
afi2_bready	x393
afi2_bid	x393
afi2_bresp	x393
afi2_wcount	x393
afi2_wacount	x393
afi2_wrissuecap1en	x393
rready	axibram_read	Input
rid	axibram_read	Output
PREFETCH_ALWAYS	sata_ahci_top	Parameter
ADDRESS_BITS	sata_ahci_top	Parameter
DATASCOPE_START_BIT	sata_ahci_top	Parameter
DATASCOPE_POST_MEAS	sata_ahci_top	Parameter
HBA_RESET_BITS	sata_ahci_top	Parameter
RESET_TO_FIRST_ACCESS	sata_ahci_top	Parameter
BITS_TO_START_XMIT	sata_ahci_top	Parameter
DATA_BYTE_WIDTH	sata_ahci_top	Parameter
ELASTIC_DEPTH	sata_ahci_top	Parameter
ELASTIC_OFFSET	sata_ahci_top	Parameter
FREQ_METER_WIDTH	sata_ahci_top	Parameter
sata_clk	sata_ahci_top	Output
sata_rst	sata_ahci_top	Output
arst	sata_ahci_top	Input
reliable_clk	sata_ahci_top	Input
hclk	sata_ahci_top	Input
ACLK	sata_ahci_top	Input
ARESETN	sata_ahci_top	Input
ARADDR	sata_ahci_top	Input
ARVALID	sata_ahci_top	Input
ARREADY	sata_ahci_top	Output
ARID	sata_ahci_top	Input
ARLEN	sata_ahci_top	Input
ARSIZE	sata_ahci_top	Input
ARBURST	sata_ahci_top	Input
RDATA	sata_ahci_top	Output
RVALID	sata_ahci_top	Output
RREADY	sata_ahci_top	Input
RID	sata_ahci_top	Output
RLAST	sata_ahci_top	Output
RRESP	sata_ahci_top	Output
AWADDR	sata_ahci_top	Input
AWVALID	sata_ahci_top	Input
AWREADY	sata_ahci_top	Output
AWID	sata_ahci_top	Input
AWLEN	sata_ahci_top	Input
AWSIZE	sata_ahci_top	Input
AWBURST	sata_ahci_top	Input
WDATA	sata_ahci_top	Input
WVALID	sata_ahci_top	Input
WREADY	sata_ahci_top	Output
WID	sata_ahci_top	Input
WLAST	sata_ahci_top	Input
WSTRB	sata_ahci_top	Input
BVALID	sata_ahci_top	Output
BREADY	sata_ahci_top	Input
BID	sata_ahci_top	Output
BRESP	sata_ahci_top	Output
afi_awaddr	sata_ahci_top	Output
afi_awvalid	sata_ahci_top	Output
afi_awready	sata_ahci_top	Input
afi_awid	sata_ahci_top	Output
afi_awlock	sata_ahci_top	Output
afi_awcache	sata_ahci_top	Output
afi_awprot	sata_ahci_top	Output
afi_awlen	sata_ahci_top	Output
afi_awsize	sata_ahci_top	Output
afi_awburst	sata_ahci_top	Output
afi_awqos	sata_ahci_top	Output
afi_wdata	sata_ahci_top	Output
afi_wvalid	sata_ahci_top	Output
afi_wready	sata_ahci_top	Input
afi_wid	sata_ahci_top	Output
afi_wlast	sata_ahci_top	Output
afi_wstrb	sata_ahci_top	Output
afi_bvalid	sata_ahci_top	Input
afi_bready	sata_ahci_top	Output
afi_bid	sata_ahci_top	Input
afi_bresp	sata_ahci_top	Input
afi_wcount	sata_ahci_top	Input
afi_wacount	sata_ahci_top	Input
afi_wrissuecap1en	sata_ahci_top	Output
afi_araddr	sata_ahci_top	Output
afi_arvalid	sata_ahci_top	Output
afi_arready	sata_ahci_top	Input
afi_arid	sata_ahci_top	Output
afi_arlock	sata_ahci_top	Output
afi_arcache	sata_ahci_top	Output
afi_arprot	sata_ahci_top	Output
afi_arlen	sata_ahci_top	Output
afi_arsize	sata_ahci_top	Output
afi_arburst	sata_ahci_top	Output
afi_arqos	sata_ahci_top	Output
afi_rdata	sata_ahci_top	Input
afi_rvalid	sata_ahci_top	Input
afi_rready	sata_ahci_top	Output
afi_rid	sata_ahci_top	Input
afi_rlast	sata_ahci_top	Input
afi_rresp	sata_ahci_top	Input
afi_rcount	sata_ahci_top	Input
afi_racount	sata_ahci_top	Input
afi_rdissuecap1en	sata_ahci_top	Output
irq	sata_ahci_top	Output
TXN	sata_ahci_top	Output
TXP	sata_ahci_top	Output
RXN	sata_ahci_top	Input
RXP	sata_ahci_top	Input
EXTCLK_P	sata_ahci_top	Input
EXTCLK_N	sata_ahci_top	Input
hba_arst	sata_ahci_top	Signal
port_arst	sata_ahci_top	Signal
port_arst_any	sata_ahci_top	Signal
exrst	sata_ahci_top	Signal
h2d_data	sata_ahci_top	Signal
h2d_type	sata_ahci_top	Signal
h2d_valid	sata_ahci_top	Signal
h2d_ready	sata_ahci_top	Signal
d2h_data	sata_ahci_top	Signal
d2h_type	sata_ahci_top	Signal
d2h_valid	sata_ahci_top	Signal
d2h_many	sata_ahci_top	Signal
d2h_ready	sata_ahci_top	Signal
phy_speed	sata_ahci_top	Signal
xmit_ok	sata_ahci_top	Signal
xmit_err	sata_ahci_top	Signal
syncesc_recv	sata_ahci_top	Signal
pcmd_st_cleared	sata_ahci_top	Signal
syncesc_send	sata_ahci_top	Signal
syncesc_send_done	sata_ahci_top	Signal
comreset_send	sata_ahci_top	Signal
cominit_got	sata_ahci_top	Signal
set_offline	sata_ahci_top	Signal
x_rdy_collision	sata_ahci_top	Signal
send_R_OK	sata_ahci_top	Signal
send_R_ERR	sata_ahci_top	Signal
serr_DT	sata_ahci_top	Signal
serr_DS	sata_ahci_top	Signal
serr_DH	sata_ahci_top	Signal
serr_DC	sata_ahci_top	Signal
serr_DB	sata_ahci_top	Signal
serr_DW	sata_ahci_top	Signal
serr_DI	sata_ahci_top	Signal
serr_EE	sata_ahci_top	Signal
serr_EP	sata_ahci_top	Signal
serr_EC	sata_ahci_top	Signal
serr_ET	sata_ahci_top	Signal
serr_EM	sata_ahci_top	Signal
serr_EI	sata_ahci_top	Signal
sctl_ipm	sata_ahci_top	Signal
sctl_spd	sata_ahci_top	Signal
nhrst_r	sata_ahci_top	Signal
hrst	sata_ahci_top	Signal
xclk_period	sata_ahci_top	Signal
datascope_clk	sata_ahci_top	Signal
datascope_waddr	sata_ahci_top	Signal
datascope_we	sata_ahci_top	Signal
datascope_di	sata_ahci_top	Signal
drp_en	sata_ahci_top	Signal
drp_we	sata_ahci_top	Signal
drp_addr	sata_ahci_top	Signal
drp_di	sata_ahci_top	Signal
drp_rdy	sata_ahci_top	Signal
drp_do	sata_ahci_top	Signal
debug_phy	sata_ahci_top	Signal
debug_link	sata_ahci_top	Signal
rlast	axibram_read	Output
rresp	axibram_read	Output
pre_araddr	axibram_read	Output
start_burst	axibram_read	Output
CMPRS_NUM_AFI_CHN	compressor393	Parameter
CMPRS_GROUP_ADDR	compressor393	Parameter
CMPRS_BASE_INC	compressor393	Parameter
CMPRS_AFIMUX_RADDR0	compressor393	Parameter
CMPRS_AFIMUX_RADDR1	compressor393	Parameter
CMPRS_AFIMUX_MASK	compressor393	Parameter
CMPRS_STATUS_REG_BASE	compressor393	Parameter
CMPRS_HIFREQ_REG_BASE	compressor393	Parameter
CMPRS_AFIMUX_REG_ADDR0	compressor393	Parameter
CMPRS_AFIMUX_REG_ADDR1	compressor393	Parameter
CMPRS_STATUS_REG_INC	compressor393	Parameter
CMPRS_HIFREQ_REG_INC	compressor393	Parameter
CMPRS_MASK	compressor393	Parameter
CMPRS_CONTROL_REG	compressor393	Parameter
CMPRS_STATUS_CNTRL	compressor393	Parameter
CMPRS_FORMAT	compressor393	Parameter
CMPRS_COLOR_SATURATION	compressor393	Parameter
CMPRS_CORING_MODE	compressor393	Parameter
CMPRS_INTERRUPTS	compressor393	Parameter
CMPRS_TABLES	compressor393	Parameter
TABLE_QUANTIZATION_INDEX	compressor393	Parameter
TABLE_CORING_INDEX	compressor393	Parameter
TABLE_FOCUS_INDEX	compressor393	Parameter
TABLE_HUFFMAN_INDEX	compressor393	Parameter
FRAME_HEIGHT_BITS	compressor393	Parameter
LAST_FRAME_BITS	compressor393	Parameter
CMPRS_CBIT_RUN	compressor393	Parameter
CMPRS_CBIT_RUN_BITS	compressor393	Parameter
CMPRS_CBIT_QBANK	compressor393	Parameter
CMPRS_CBIT_QBANK_BITS	compressor393	Parameter
CMPRS_CBIT_DCSUB	compressor393	Parameter
CMPRS_CBIT_DCSUB_BITS	compressor393	Parameter
CMPRS_CBIT_CMODE	compressor393	Parameter
CMPRS_CBIT_CMODE_BITS	compressor393	Parameter
CMPRS_CBIT_FRAMES	compressor393	Parameter
CMPRS_CBIT_FRAMES_BITS	compressor393	Parameter
CMPRS_CBIT_BAYER	compressor393	Parameter
CMPRS_CBIT_BAYER_BITS	compressor393	Parameter
CMPRS_CBIT_FOCUS	compressor393	Parameter
CMPRS_CBIT_FOCUS_BITS	compressor393	Parameter
CMPRS_CBIT_RUN_RST	compressor393	Parameter
CMPRS_CBIT_RUN_STANDALONE	compressor393	Parameter
CMPRS_CBIT_RUN_ENABLE	compressor393	Parameter
CMPRS_CBIT_CMODE_JPEG18	compressor393	Parameter
CMPRS_CBIT_CMODE_MONO6	compressor393	Parameter
CMPRS_CBIT_CMODE_JP46	compressor393	Parameter
CMPRS_CBIT_CMODE_JP46DC	compressor393	Parameter
CMPRS_CBIT_CMODE_JPEG20	compressor393	Parameter
CMPRS_CBIT_CMODE_JP4	compressor393	Parameter
CMPRS_CBIT_CMODE_JP4DC	compressor393	Parameter
CMPRS_CBIT_CMODE_JP4DIFF	compressor393	Parameter
CMPRS_CBIT_CMODE_JP4DIFFHDR	compressor393	Parameter
CMPRS_CBIT_CMODE_JP4DIFFDIV2	compressor393	Parameter
dev_ready	axibram_read	Input
CMPRS_CBIT_CMODE_JP4DIFFHDRDIV2	compressor393	Parameter
CMPRS_CBIT_CMODE_MONO1	compressor393	Parameter
CMPRS_CBIT_CMODE_MONO4	compressor393	Parameter
CMPRS_CBIT_FRAMES_SINGLE	compressor393	Parameter
CMPRS_COLOR18	compressor393	Parameter
CMPRS_COLOR20	compressor393	Parameter
CMPRS_MONO16	compressor393	Parameter
CMPRS_JP4	compressor393	Parameter
CMPRS_JP4DIFF	compressor393	Parameter
CMPRS_MONO8	compressor393	Parameter
CMPRS_FRMT_MBCM1	compressor393	Parameter
CMPRS_FRMT_MBCM1_BITS	compressor393	Parameter
CMPRS_FRMT_MBRM1	compressor393	Parameter
CMPRS_FRMT_MBRM1_BITS	compressor393	Parameter
CMPRS_FRMT_LMARG	compressor393	Parameter
CMPRS_FRMT_LMARG_BITS	compressor393	Parameter
CMPRS_CSAT_CB	compressor393	Parameter
CMPRS_CSAT_CB_BITS	compressor393	Parameter
CMPRS_CSAT_CR	compressor393	Parameter
CMPRS_CSAT_CR_BITS	compressor393	Parameter
CMPRS_CORING_BITS	compressor393	Parameter
CMPRS_TIMEOUT_BITS	compressor393	Parameter
CMPRS_TIMEOUT	compressor393	Parameter
CMPRS_AFIMUX_EN	compressor393	Parameter
CMPRS_AFIMUX_RST	compressor393	Parameter
CMPRS_AFIMUX_MODE	compressor393	Parameter
CMPRS_AFIMUX_STATUS_CNTRL	compressor393	Parameter
CMPRS_AFIMUX_SA_LEN	compressor393	Parameter
CMPRS_AFIMUX_WIDTH	compressor393	Parameter
CMPRS_AFIMUX_CYCBITS	compressor393	Parameter
AFI_MUX_BUF_LATENCY	compressor393	Parameter
1931	compressor393	Parameter
1932	compressor393	Parameter
xclk	compressor393	Input
mrst	compressor393	Input
xrst	compressor393	Input
hrst	compressor393	Input
mclk	compressor393	Input
cmd_ad	compressor393	Input
cmd_stb	compressor393	Input
status_ad	compressor393	Output
status_rq	compressor393	Output
status_start	compressor393	Input
cmprs_irq	compressor393	Output
xfer_reset_page_rd	compressor393	Input
buf_wpage_nxt	compressor393	Input
buf_we	compressor393	Input
buf_din	compressor393	Input
page_ready	compressor393	Input
next_page	compressor393	Output
frame_start_dst	compressor393	Output
line_unfinished_src	compressor393	Input
frame_number_src	compressor393	Input
frame_done_src	compressor393	Input
line_unfinished_dst	compressor393	Input
frame_number_dst	compressor393	Input
frame_done_dst	compressor393	Input
suspend	compressor393	Output
frame_number_finished	compressor393	Output
ts_pre_stb	compressor393	Input
ts_data	compressor393	Input
eof_written_mclk	compressor393	Output
stuffer_done_mclk	compressor393	Output
vsync_late	compressor393	Input
frame_num_compressed	compressor393	Input
hclk	compressor393	Input
afi0_awaddr	compressor393	Output
afi0_awvalid	compressor393	Output
afi0_awready	compressor393	Input
afi0_awid	compressor393	Output
afi0_awlock	compressor393	Output
afi0_awcache	compressor393	Output
afi0_awprot	compressor393	Output
afi0_awlen	compressor393	Output
afi0_awsize	compressor393	Output
afi0_awburst	compressor393	Output
afi0_awqos	compressor393	Output
afi0_wdata	compressor393	Output
afi0_wvalid	compressor393	Output
afi0_wready	compressor393	Input
afi0_wid	compressor393	Output
afi0_wlast	compressor393	Output
afi0_wstrb	compressor393	Output
afi0_bvalid	compressor393	Input
afi0_bready	compressor393	Output
afi0_bid	compressor393	Input
afi0_bresp	compressor393	Input
afi0_wcount	compressor393	Input
afi0_wacount	compressor393	Input
afi0_wrissuecap1en	compressor393	Output
afi1_clk	compressor393	Output
afi1_awaddr	compressor393	Output
afi1_awvalid	compressor393	Output
afi1_awready	compressor393	Input
afi1_awid	compressor393	Output
afi1_awlock	compressor393	Output
afi1_awcache	compressor393	Output
afi1_awprot	compressor393	Output
afi1_awlen	compressor393	Output
afi1_awsize	compressor393	Output
bram_rclk	axibram_read	Output
aclk	axibram_read	Input
afi1_awburst	compressor393	Output
afi1_awqos	compressor393	Output
afi1_wdata	compressor393	Output
afi1_wvalid	compressor393	Output
afi1_wready	compressor393	Input
afi1_wid	compressor393	Output
afi1_wlast	compressor393	Output
afi1_wstrb	compressor393	Output
afi1_bvalid	compressor393	Input
afi1_bready	compressor393	Output
afi1_bid	compressor393	Input
afi1_bresp	compressor393	Input
afi1_wcount	compressor393	Input
afi1_wacount	compressor393	Input
afi1_wrissuecap1en	compressor393	Output
debug_do	compressor393	Output
debug_sl	compressor393	Input
debug_di	compressor393	Input
DEBUG_RING_LENGTH	compressor393	Parameter
debug_ring	compressor393	Signal
status_ad_mux	compressor393	Signal
status_rq_mux	compressor393	Signal
status_start_mux	compressor393	Signal
fifo_rst	compressor393	Signal
fifo_ren	compressor393	Signal
fifo_rdata	compressor393	Signal
fifo_eof	compressor393	Signal
eof_written	compressor393	Signal
fifo_flush	compressor393	Signal
flush_hclk	compressor393	Signal
fifo_count	compressor393	Signal
bram_raddr	axibram_read	Output
bram_ren	axibram_read	Output
bram_regen	axibram_read	Output
bram_rdata	axibram_read	Input
ar_nempty	axibram_read	Signal
ar_half_full	axibram_read	Signal
arburst_out	axibram_read	Signal
arsize_out	axibram_read	Signal
arlen_out	axibram_read	Signal
araddr_out	axibram_read	Signal
arst	axibram_read	Input
arid_out	axibram_read	Signal
read_in_progress	axibram_read	Signal
read_in_progress_d	axibram_read	Signal
read_in_progress_or	axibram_read	Signal
LOGGER_ADDR	event_logger	Parameter
LOGGER_STATUS	event_logger	Parameter
LOGGER_STATUS_REG_ADDR	event_logger	Parameter
LOGGER_MASK	event_logger	Parameter
LOGGER_STATUS_MASK	event_logger	Parameter
LOGGER_PAGE_GPS	event_logger	Parameter
LOGGER_PAGE_MSG	event_logger	Parameter
LOGGER_PAGE_IMU	event_logger	Parameter
LOGGER_PERIOD	event_logger	Parameter
LOGGER_BIT_DURATION	event_logger	Parameter
LOGGER_BIT_HALF_PERIOD	event_logger	Parameter
LOGGER_CONFIG	event_logger	Parameter
LOGGER_CONF_IMU	event_logger	Parameter
LOGGER_CONF_IMU_BITS	event_logger	Parameter
LOGGER_CONF_GPS	event_logger	Parameter
LOGGER_CONF_GPS_BITS	event_logger	Parameter
LOGGER_CONF_MSG	event_logger	Parameter
LOGGER_CONF_MSG_BITS	event_logger	Parameter
LOGGER_CONF_SYN	event_logger	Parameter
LOGGER_CONF_SYN_BITS	event_logger	Parameter
LOGGER_CONF_EN	event_logger	Parameter
LOGGER_CONF_EN_BITS	event_logger	Parameter
LOGGER_CONF_DBG	event_logger	Parameter
LOGGER_CONF_DBG_BITS	event_logger	Parameter
GPIO_N	event_logger	Parameter
mclk	event_logger	Input
xclk	event_logger	Input
mrst	event_logger	Input
xrst	event_logger	Input
cmd_ad	event_logger	Input
cmd_stb	event_logger	Input
status_ad	event_logger	Output
status_rq	event_logger	Output
status_start	event_logger	Input
ts_local_snap	event_logger	Output
ts_local_stb	event_logger	Input
ts_local_data	event_logger	Input
ext_di	event_logger	Input
ext_do	event_logger	Output
ext_en	event_logger	Output
ts_stb_chn0	event_logger	Input
ts_data_chn0	event_logger	Input
ts_stb_chn1	event_logger	Input
ts_data_chn1	event_logger	Input
ts_stb_chn2	event_logger	Input
ts_data_chn2	event_logger	Input
ts_stb_chn3	event_logger	Input
ts_data_chn3	event_logger	Input
data_out	event_logger	Output
data_out_stb	event_logger	Output
debug_state	event_logger	Output
sample_counter	event_logger	Signal
ser_di	event_logger	Signal
gps_pulse1sec	event_logger	Signal
mosi	event_logger	Signal
miso	event_logger	Signal
sda	event_logger	Signal
sda_en	event_logger	Signal
scl	event_logger	Signal
scl_en	event_logger	Signal
ctrl_addr	event_logger	Signal
we_d	event_logger	Signal
we_imu	event_logger	Signal
we_gps	event_logger	Signal
we_period	event_logger	Signal
we_bit_duration	event_logger	Signal
we_message	event_logger	Signal
we_config_imu	event_logger	Signal
we_config_gps	event_logger	Signal
we_config_msg	event_logger	Signal
we_config_syn	event_logger	Signal
we_config_rst	event_logger	Signal
we_config_debug	event_logger	Signal
we_bitHalfPeriod	event_logger	Signal
config_imu	event_logger	Signal
config_gps	event_logger	Signal
config_msg	event_logger	Signal
config_rst	event_logger	Signal
config_debug	event_logger	Signal
bitHalfPeriod	event_logger	Signal
we_config_imu_xclk	event_logger	Signal
read_address	axibram_read	Signal
we_config_gps_xclk	event_logger	Signal
we_config_msg_xclk	event_logger	Signal
we_config_rst_xclk	event_logger	Signal
we_config_debug_xclk	event_logger	Signal
we_bitHalfPeriod_xclk	event_logger	Signal
config_imu_mclk	event_logger	Signal
config_gps_mclk	event_logger	Signal
config_msg_mclk	event_logger	Signal
config_syn_mclk	event_logger	Signal
config_rst_mclk	event_logger	Signal
config_debug_mclk	event_logger	Signal
bitHalfPeriod_mclk	event_logger	Signal
enable_gps	event_logger	Signal
enable_msg	event_logger	Signal
enable_syn_mclk	event_logger	Signal
enable_timestamps	event_logger	Signal
message_trig	event_logger	Signal
gps_ts_stb	event_logger	Signal
ser_do	event_logger	Signal
ser_do_stb	event_logger	Signal
imu_data	event_logger	Signal
nmea_data	event_logger	Signal
extts_data	event_logger	Signal
msg_data	event_logger	Signal
timestamps_rdata	event_logger	Signal
gps_pulse1sec_d	event_logger	Signal
gps_pulse1sec_denoise	event_logger	Signal
gps_pulse1sec_denoise_count	event_logger	Signal
gps_pulse1sec_single	event_logger	Signal
timestamp_request	event_logger	Signal
timestamp_ackn	event_logger	Signal
timestamp_request_long	event_logger	Signal
channel_ready	event_logger	Signal
channel_next	event_logger	Signal
channel	event_logger	Signal
timestamp_sel	event_logger	Signal
ts_en	event_logger	Signal
mux_data_valid	event_logger	Signal
mux_data_source	event_logger	Signal
mux_rdy_source	event_logger	Signal
mux_data_final	event_logger	Signal
rs232_wait_pause	event_logger	Signal
rs232_start	event_logger	Signal
nmea_sent_start	event_logger	Signal
dbg_cntr	event_logger	Signal
pre_message_trig	event_logger	Signal
ext_di16	event_logger	Signal
cmd_a	event_logger	Signal
cmd_data	event_logger	Signal
cmd_data_r	event_logger	Signal
cmd_we	event_logger	Signal
cmd_status	event_logger	Signal
debug_unused_a	event_logger	Signal
read_left	axibram_read	Signal
rburst	axibram_read	Signal
rlen	axibram_read	Signal
next_rd_address_w	axibram_read	Signal
start_read_burst_w	axibram_read	Signal
araddr	axibram_read	Input
bram_reg_re_w	axibram_read	Signal
read_in_progress_w	axibram_read	Signal
read_in_progress_d_w	axibram_read	Signal
last_in_burst_w	axibram_read	Signal
last_in_burst_d_w	axibram_read	Signal
MCONTR_SENS_BASE	mcntrl393	Parameter
MCONTR_SENS_INC	mcntrl393	Parameter
MCONTR_CMPRS_BASE	mcntrl393	Parameter
MCONTR_CMPRS_INC	mcntrl393	Parameter
MCONTR_SENS_STATUS_BASE	mcntrl393	Parameter
MCONTR_SENS_STATUS_INC	mcntrl393	Parameter
MCONTR_CMPRS_STATUS_BASE	mcntrl393	Parameter
MCONTR_CMPRS_STATUS_INC	mcntrl393	Parameter
MCONTR_WR_MASK	mcntrl393	Parameter
MCONTR_RD_MASK	mcntrl393	Parameter
MCONTR_CMD_WR_ADDR	mcntrl393	Parameter
MCONTR_BUF0_RD_ADDR	mcntrl393	Parameter
MCONTR_BUF0_WR_ADDR	mcntrl393	Parameter
MCONTR_BUF2_RD_ADDR	mcntrl393	Parameter
MCONTR_BUF2_WR_ADDR	mcntrl393	Parameter
MCONTR_BUF3_RD_ADDR	mcntrl393	Parameter
MCONTR_BUF3_WR_ADDR	mcntrl393	Parameter
MCONTR_BUF4_RD_ADDR	mcntrl393	Parameter
MCONTR_BUF4_WR_ADDR	mcntrl393	Parameter
AXI_WR_ADDR_BITS	mcntrl393	Parameter
AXI_RD_ADDR_BITS	mcntrl393	Parameter
DLY_LD	mcntrl393	Parameter
DLY_LD_MASK	mcntrl393	Parameter
MCONTR_PHY_0BIT_ADDR	mcntrl393	Parameter
MCONTR_PHY_0BIT_ADDR_MASK	mcntrl393	Parameter
MCONTR_PHY_0BIT_DLY_SET	mcntrl393	Parameter
MCONTR_PHY_0BIT_CMDA_EN	mcntrl393	Parameter
MCONTR_PHY_0BIT_SDRST_ACT	mcntrl393	Parameter
MCONTR_PHY_0BIT_CKE_EN	mcntrl393	Parameter
MCONTR_PHY_0BIT_DCI_RST	mcntrl393	Parameter
MCONTR_PHY_0BIT_DLY_RST	mcntrl393	Parameter
MCONTR_TOP_0BIT_ADDR	mcntrl393	Parameter
MCONTR_TOP_0BIT_ADDR_MASK	mcntrl393	Parameter
MCONTR_TOP_0BIT_MCONTR_EN	mcntrl393	Parameter
MCONTR_TOP_0BIT_REFRESH_EN	mcntrl393	Parameter
MCONTR_PHY_16BIT_ADDR	mcntrl393	Parameter
MCONTR_PHY_16BIT_ADDR_MASK	mcntrl393	Parameter
MCONTR_PHY_16BIT_PATTERNS	mcntrl393	Parameter
MCONTR_PHY_16BIT_PATTERNS_TRI	mcntrl393	Parameter
MCONTR_PHY_16BIT_WBUF_DELAY	mcntrl393	Parameter
MCONTR_PHY_16BIT_EXTRA	mcntrl393	Parameter
MCONTR_PHY_STATUS_CNTRL	mcntrl393	Parameter
MCONTR_ARBIT_ADDR	mcntrl393	Parameter
pre_last_in_burst_r	axibram_read	Signal
MCONTR_ARBIT_ADDR_MASK	mcntrl393	Parameter
MCONTR_TOP_16BIT_ADDR	mcntrl393	Parameter
MCONTR_TOP_16BIT_ADDR_MASK	mcntrl393	Parameter
MCONTR_TOP_16BIT_CHN_EN	mcntrl393	Parameter
MCONTR_TOP_16BIT_REFRESH_PERIOD	mcntrl393	Parameter
MCONTR_TOP_16BIT_REFRESH_ADDRESS	mcntrl393	Parameter
MCONTR_TOP_16BIT_STATUS_CNTRL	mcntrl393	Parameter
MCONTR_PHY_STATUS_REG_ADDR	mcntrl393	Parameter
MCONTR_TOP_STATUS_REG_ADDR	mcntrl393	Parameter
CHNBUF_READ_LATENCY	mcntrl393	Parameter
DFLT_DQS_PATTERN	mcntrl393	Parameter
DFLT_DQM_PATTERN	mcntrl393	Parameter
DFLT_DQ_TRI_ON_PATTERN	mcntrl393	Parameter
DFLT_DQ_TRI_OFF_PATTERN	mcntrl393	Parameter
DFLT_DQS_TRI_ON_PATTERN	mcntrl393	Parameter
DFLT_DQS_TRI_OFF_PATTERN	mcntrl393	Parameter
DFLT_WBUF_DELAY	mcntrl393	Parameter
DFLT_INV_CLK_DIV	mcntrl393	Parameter
DFLT_CHN_EN	mcntrl393	Parameter
DFLT_REFRESH_ADDR	mcntrl393	Parameter
DFLT_REFRESH_PERIOD	mcntrl393	Parameter
ADDRESS_NUMBER	mcntrl393	Parameter
COLADDR_NUMBER	mcntrl393	Parameter
PHASE_WIDTH	mcntrl393	Parameter
SLEW_DQ	mcntrl393	Parameter
SLEW_DQS	mcntrl393	Parameter
SLEW_CMDA	mcntrl393	Parameter
SLEW_CLK	mcntrl393	Parameter
IBUF_LOW_PWR	mcntrl393	Parameter
REFCLK_FREQUENCY	mcntrl393	Parameter
HIGH_PERFORMANCE_MODE	mcntrl393	Parameter
CLKIN_PERIOD	mcntrl393	Parameter
CLKFBOUT_MULT	mcntrl393	Parameter
DIVCLK_DIVIDE	mcntrl393	Parameter
CLKFBOUT_USE_FINE_PS	mcntrl393	Parameter
CLKFBOUT_PHASE	mcntrl393	Parameter
SDCLK_PHASE	mcntrl393	Parameter
CLK_PHASE	mcntrl393	Parameter
CLK_DIV_PHASE	mcntrl393	Parameter
MCLK_PHASE	mcntrl393	Parameter
REF_JITTER1	mcntrl393	Parameter
SS_EN	mcntrl393	Parameter
SS_MODE	mcntrl393	Parameter
SS_MOD_PERIOD	mcntrl393	Parameter
CMD_PAUSE_BITS	mcntrl393	Parameter
CMD_DONE_BIT	mcntrl393	Parameter
MCNTRL_PS_ADDR	mcntrl393	Parameter
MCNTRL_PS_MASK	mcntrl393	Parameter
MCNTRL_PS_STATUS_REG_ADDR	mcntrl393	Parameter
MCNTRL_PS_EN_RST	mcntrl393	Parameter
MCNTRL_PS_CMD	mcntrl393	Parameter
MCNTRL_PS_STATUS_CNTRL	mcntrl393	Parameter
NUM_XFER_BITS	mcntrl393	Parameter
FRAME_WIDTH_BITS	mcntrl393	Parameter
FRAME_HEIGHT_BITS	mcntrl393	Parameter
LAST_FRAME_BITS	mcntrl393	Parameter
MCNTRL_SCANLINE_CHN1_ADDR	mcntrl393	Parameter
MCNTRL_SCANLINE_CHN3_ADDR	mcntrl393	Parameter
MCNTRL_SCANLINE_MASK	mcntrl393	Parameter
MCNTRL_SCANLINE_MODE	mcntrl393	Parameter
MCNTRL_SCANLINE_STATUS_CNTRL	mcntrl393	Parameter
MCNTRL_SCANLINE_STARTADDR	mcntrl393	Parameter
MCNTRL_SCANLINE_FRAME_SIZE	mcntrl393	Parameter
MCNTRL_SCANLINE_FRAME_LAST	mcntrl393	Parameter
MCNTRL_SCANLINE_FRAME_FULL_WIDTH	mcntrl393	Parameter
MCNTRL_SCANLINE_WINDOW_WH	mcntrl393	Parameter
MCNTRL_SCANLINE_WINDOW_X0Y0	mcntrl393	Parameter
MCNTRL_SCANLINE_WINDOW_STARTXY	mcntrl393	Parameter
MCNTRL_SCANLINE_STATUS_REG_CHN1_ADDR	mcntrl393	Parameter
MCNTRL_SCANLINE_STATUS_REG_CHN3_ADDR	mcntrl393	Parameter
MCNTRL_SCANLINE_PENDING_CNTR_BITS	mcntrl393	Parameter
MCNTRL_SCANLINE_FRAME_PAGE_RESET	mcntrl393	Parameter
MAX_TILE_WIDTH	mcntrl393	Parameter
MAX_TILE_HEIGHT	mcntrl393	Parameter
MCNTRL_TILED_CHN2_ADDR	mcntrl393	Parameter
MCNTRL_TILED_CHN4_ADDR	mcntrl393	Parameter
MCNTRL_TILED_MASK	mcntrl393	Parameter
MCNTRL_TILED_MODE	mcntrl393	Parameter
MCNTRL_TILED_STATUS_CNTRL	mcntrl393	Parameter
MCNTRL_TILED_STARTADDR	mcntrl393	Parameter
MCNTRL_TILED_FRAME_SIZE	mcntrl393	Parameter
MCNTRL_TILED_FRAME_LAST	mcntrl393	Parameter
MCNTRL_TILED_FRAME_FULL_WIDTH	mcntrl393	Parameter
MCNTRL_TILED_WINDOW_WH	mcntrl393	Parameter
MCNTRL_TILED_WINDOW_X0Y0	mcntrl393	Parameter
MCNTRL_TILED_WINDOW_STARTXY	mcntrl393	Parameter
MCNTRL_TILED_TILE_WHS	mcntrl393	Parameter
MCNTRL_TILED_STATUS_REG_CHN2_ADDR	mcntrl393	Parameter
MCNTRL_TILED_STATUS_REG_CHN4_ADDR	mcntrl393	Parameter
MCNTRL_TILED_PENDING_CNTR_BITS	mcntrl393	Parameter
MCNTRL_TILED_FRAME_PAGE_RESET	mcntrl393	Parameter
BUFFER_DEPTH32	mcntrl393	Parameter
RSEL	mcntrl393	Parameter
WSEL	mcntrl393	Parameter
MCONTR_LINTILE_NRESET	mcntrl393	Parameter
MCONTR_LINTILE_EN	mcntrl393	Parameter
MCONTR_LINTILE_WRITE	mcntrl393	Parameter
MCONTR_LINTILE_EXTRAPG	mcntrl393	Parameter
MCONTR_LINTILE_EXTRAPG_BITS	mcntrl393	Parameter
MCONTR_LINTILE_KEEP_OPEN	mcntrl393	Parameter
pre_rvalid_w	axibram_read	Signal
MCONTR_LINTILE_BYTE32	mcntrl393	Parameter
MCONTR_LINTILE_RST_FRAME	mcntrl393	Parameter
MCONTR_LINTILE_SINGLE	mcntrl393	Parameter
MCONTR_LINTILE_REPEAT	mcntrl393	Parameter
MCONTR_LINTILE_DIS_NEED	mcntrl393	Parameter
MCONTR_LINTILE_SKIP_LATE	mcntrl393	Parameter
rst_in	mcntrl393	Input
clk_in	mcntrl393	Input
mclk	mcntrl393	Output
mrst	mcntrl393	Input
locked	mcntrl393	Output
ref_clk	mcntrl393	Input
idelay_ctrl_reset	mcntrl393	Output
cmd_ad	mcntrl393	Input
cmd_stb	mcntrl393	Input
status_ad	mcntrl393	Output
status_rq	mcntrl393	Output
status_start	mcntrl393	Input
axi_clk	mcntrl393	Input
axiwr_pre_awaddr	mcntrl393	Input
axiwr_start_burst	mcntrl393	Input
axiwr_waddr	mcntrl393	Input
axiwr_wen	mcntrl393	Input
axiwr_data	mcntrl393	Input
axird_pre_araddr	mcntrl393	Input
axird_start_burst	mcntrl393	Input
axird_raddr	mcntrl393	Input
axird_ren	mcntrl393	Input
axird_regen	mcntrl393	Input
axird_rdata	mcntrl393	Output
axird_selected	mcntrl393	Output
sens_sof	mcntrl393	Input
sens_frame_run	mcntrl393	Output
sens_rpage_set	mcntrl393	Output
sens_rpage_next	mcntrl393	Output
sens_buf_rd	mcntrl393	Output
sens_buf_dout	mcntrl393	Input
sens_page_written	mcntrl393	Input
sens_xfer_skipped	mcntrl393	Output
sens_first_wr_in_frame	mcntrl393	Output
cmprs_xfer_reset_page_rd	mcntrl393	Output
cmprs_buf_wpage_nxt	mcntrl393	Output
cmprs_buf_we	mcntrl393	Output
cmprs_buf_din	mcntrl393	Output
cmprs_page_ready	mcntrl393	Output
cmprs_next_page	mcntrl393	Input
cmprs_first_rd_in_frame	mcntrl393	Output
cmprs_frame_start_dst	mcntrl393	Input
cmprs_line_unfinished_src	mcntrl393	Output
cmprs_frame_number_src	mcntrl393	Output
cmprs_frame_done_src	mcntrl393	Output
cmprs_line_unfinished_dst	mcntrl393	Output
cmprs_frame_number_dst	mcntrl393	Output
cmprs_frame_done_dst	mcntrl393	Output
cmprs_suspend	mcntrl393	Input
frame_start_chn1	mcntrl393	Input
next_page_chn1	mcntrl393	Input
cmd_wrmem_chn1	mcntrl393	Output
page_ready_chn1	mcntrl393	Output
frame_done_chn1	mcntrl393	Output
line_unfinished_chn1	mcntrl393	Output
suspend_chn1	mcntrl393	Input
xfer_reset_page1_rd	mcntrl393	Output
buf_wpage_nxt_chn1	mcntrl393	Output
buf_wr_chn1	mcntrl393	Output
buf_wdata_chn1	mcntrl393	Output
xfer_reset_page1_wr	mcntrl393	Output
rpage_nxt_chn1	mcntrl393	Output
buf_rd_chn1	mcntrl393	Output
buf_rdata_chn1	mcntrl393	Input
frame_start_chn2	mcntrl393	Input
next_page_chn2	mcntrl393	Input
page_ready_chn2	mcntrl393	Output
frame_done_chn2	mcntrl393	Output
line_unfinished_chn2	mcntrl393	Output
frame_number_chn2	mcntrl393	Output
suspend_chn2	mcntrl393	Input
frame_start_chn3	mcntrl393	Input
next_page_chn3	mcntrl393	Input
page_ready_chn3	mcntrl393	Output
frame_done_chn3	mcntrl393	Output
line_unfinished_chn3	mcntrl393	Output
frame_number_chn3	mcntrl393	Output
suspend_chn3	mcntrl393	Input
frame_start_chn4	mcntrl393	Input
next_page_chn4	mcntrl393	Input
page_ready_chn4	mcntrl393	Output
frame_done_chn4	mcntrl393	Output
line_unfinished_chn4	mcntrl393	Output
frame_number_chn4	mcntrl393	Output
suspend_chn4	mcntrl393	Input
SDRST	mcntrl393	Output
SDCLK	mcntrl393	Output
SDNCLK	mcntrl393	Output
SDA	mcntrl393	Output
SDBA	mcntrl393	Output
SDWE	mcntrl393	Output
SDRAS	mcntrl393	Output
SDCAS	mcntrl393	Output
SDCKE	mcntrl393	Output
pre_left_zero_w	axibram_read	Signal
SDODT	mcntrl393	Output
SDD	mcntrl393	Inout
SDDML	mcntrl393	Output
DQSL	mcntrl393	Inout
NDQSL	mcntrl393	Inout
SDDMU	mcntrl393	Output
DQSU	mcntrl393	Inout
NDQSU	mcntrl393	Inout
tmp_debug	mcntrl393	Output
COL_WDTH	mcntrl393	Parameter
FRAME_WBP1	mcntrl393	Parameter
want_rq0	mcntrl393	Signal
need_rq0	mcntrl393	Signal
channel_pgm_en0	mcntrl393	Signal
reject0	mcntrl393	Signal
seq_data0	mcntrl393	Signal
seq_set0	mcntrl393	Signal
seq_done0	mcntrl393	Signal
buf_wr_chn0	mcntrl393	Signal
buf_wpage_nxt_chn0	mcntrl393	Signal
buf_run0	mcntrl393	Signal
buf_wdata_chn0	mcntrl393	Signal
buf_wrun0	mcntrl393	Signal
buf_rd_chn0	mcntrl393	Signal
buf_rpage_nxt_chn0	mcntrl393	Signal
buf_rdata_chn0	mcntrl393	Signal
want_rq1	mcntrl393	Signal
need_rq1	mcntrl393	Signal
channel_pgm_en1	mcntrl393	Signal
reject1	mcntrl393	Signal
seq_done1	mcntrl393	Signal
want_rq2	mcntrl393	Signal
need_rq2	mcntrl393	Signal
channel_pgm_en2	mcntrl393	Signal
reject2	mcntrl393	Signal
seq_done2	mcntrl393	Signal
buf_wr_chn2	mcntrl393	Signal
buf_wpage_nxt_chn2	mcntrl393	Signal
buf_wdata_chn2	mcntrl393	Signal
buf_rd_chn2	mcntrl393	Signal
rpage_nxt_chn2	mcntrl393	Signal
buf_rdata_chn2	mcntrl393	Signal
want_rq3	mcntrl393	Signal
need_rq3	mcntrl393	Signal
channel_pgm_en3	mcntrl393	Signal
reject3	mcntrl393	Signal
seq_done3	mcntrl393	Signal
buf_wr_chn3	mcntrl393	Signal
buf_wpage_nxt_chn3	mcntrl393	Signal
buf_wdata_chn3	mcntrl393	Signal
buf_rd_chn3	mcntrl393	Signal
rpage_nxt_chn3	mcntrl393	Signal
buf_rdata_chn3	mcntrl393	Signal
want_rq4	mcntrl393	Signal
need_rq4	mcntrl393	Signal
channel_pgm_en4	mcntrl393	Signal
reject4	mcntrl393	Signal
seq_done4	mcntrl393	Signal
buf_wr_chn4	mcntrl393	Signal
buf_wpage_nxt_chn4	mcntrl393	Signal
buf_wdata_chn4	mcntrl393	Signal
buf_rd_chn4	mcntrl393	Signal
rpage_nxt_chn4	mcntrl393	Signal
buf_rdata_chn4	mcntrl393	Signal
cmd_mcontr_ad	mcntrl393	Signal
cmd_mcontr_stb	mcntrl393	Signal
cmd_ps_pio_ad	mcntrl393	Signal
cmd_ps_pio_stb	mcntrl393	Signal
cmd_scanline_chn1_ad	mcntrl393	Signal
cmd_scanline_chn1_stb	mcntrl393	Signal
cmd_scanline_chn3_ad	mcntrl393	Signal
cmd_scanline_chn3_stb	mcntrl393	Signal
cmd_tiled_chn2_ad	mcntrl393	Signal
cmd_tiled_chn2_stb	mcntrl393	Signal
cmd_tiled_chn4_ad	mcntrl393	Signal
cmd_tiled_chn4_stb	mcntrl393	Signal
cmd_sens_ad	mcntrl393	Signal
cmd_sens_stb	mcntrl393	Signal
cmd_cmprs_ad	mcntrl393	Signal
cmd_cmprs_stb	mcntrl393	Signal
status_mcontr_ad	mcntrl393	Signal
status_mcontr_rq	mcntrl393	Signal
status_mcontr_start	mcntrl393	Signal
status_ps_pio_ad	mcntrl393	Signal
status_ps_pio_rq	mcntrl393	Signal
status_ps_pio_start	mcntrl393	Signal
status_scanline_chn1_ad	mcntrl393	Signal
status_scanline_chn1_rq	mcntrl393	Signal
status_scanline_chn1_start	mcntrl393	Signal
status_scanline_chn3_ad	mcntrl393	Signal
status_scanline_chn3_rq	mcntrl393	Signal
status_scanline_chn3_start	mcntrl393	Signal
status_tiled_chn2_ad	mcntrl393	Signal
status_tiled_chn2_rq	mcntrl393	Signal
status_tiled_chn2_start	mcntrl393	Signal
status_tiled_chn4_ad	mcntrl393	Signal
status_tiled_chn4_rq	mcntrl393	Signal
status_tiled_chn4_start	mcntrl393	Signal
status_sens_ad	mcntrl393	Signal
status_sens_rq	mcntrl393	Signal
bram_reg_re_0	axibram_read	Signal
status_sens_start	mcntrl393	Signal
status_cmprs_ad	mcntrl393	Signal
status_cmprs_rq	mcntrl393	Signal
status_cmprs_start	mcntrl393	Signal
sens_want	mcntrl393	Signal
sens_need	mcntrl393	Signal
cmprs_want	mcntrl393	Signal
cmprs_need	mcntrl393	Signal
sens_channel_pgm_en	mcntrl393	Signal
sens_reject	mcntrl393	Signal
sens_start_wr	mcntrl393	Signal
sens_bank	mcntrl393	Signal
sens_row	mcntrl393	Signal
sens_col	mcntrl393	Signal
sens_num128	mcntrl393	Signal
sens_partial	mcntrl393	Signal
sens_seq_done	mcntrl393	Signal
cmprs_channel_pgm_en	mcntrl393	Signal
cmprs_reject	mcntrl393	Signal
cmprs_start_rd16	mcntrl393	Signal
cmprs_start_rd32	mcntrl393	Signal
cmprs_bank	mcntrl393	Signal
cmprs_row	mcntrl393	Signal
cmprs_col	mcntrl393	Signal
cmprs_rowcol_inc	mcntrl393	Signal
cmprs_num_rows_m1	mcntrl393	Signal
cmprs_num_cols_m1	mcntrl393	Signal
cmprs_keep_open	mcntrl393	Signal
cmprs_partial	mcntrl393	Signal
cmprs_seq_done	mcntrl393	Signal
select_cmd0_w	mcntrl393	Signal
select_buf0rd_w	mcntrl393	Signal
select_buf0wr_w	mcntrl393	Signal
select_buf2rd_w	mcntrl393	Signal
select_buf2wr_w	mcntrl393	Signal
select_buf3rd_w	mcntrl393	Signal
select_buf3wr_w	mcntrl393	Signal
select_buf4rd_w	mcntrl393	Signal
select_buf4wr_w	mcntrl393	Signal
select_cmd0	mcntrl393	Signal
select_buf0rd	mcntrl393	Signal
select_buf0wr	mcntrl393	Signal
select_buf2rd	mcntrl393	Signal
select_buf2wr	mcntrl393	Signal
select_buf3rd	mcntrl393	Signal
select_buf3wr	mcntrl393	Signal
select_buf4rd	mcntrl393	Signal
select_buf4wr	mcntrl393	Signal
select_buf0rd_d	mcntrl393	Signal
select_buf2rd_d	mcntrl393	Signal
select_buf3rd_d	mcntrl393	Signal
select_buf4rd_d	mcntrl393	Signal
axird_selected_r	mcntrl393	Signal
buf_waddr	mcntrl393	Signal
buf_wdata	mcntrl393	Signal
cmd_we	mcntrl393	Signal
buf0wr_we	mcntrl393	Signal
buf2wr_we	mcntrl393	Signal
buf3wr_we	mcntrl393	Signal
buf4wr_we	mcntrl393	Signal
buf_raddr	mcntrl393	Signal
buf0_data	mcntrl393	Signal
buf2rd_data	mcntrl393	Signal
buf3rd_data	mcntrl393	Signal
buf4rd_data	mcntrl393	Signal
buf0_rd	mcntrl393	Signal
buf0_regen	mcntrl393	Signal
buf2rd_rd	mcntrl393	Signal
buf2rd_regen	mcntrl393	Signal
buf3rd_rd	mcntrl393	Signal
buf3rd_regen	mcntrl393	Signal
buf4rd_rd	mcntrl393	Signal
buf4rd_regen	mcntrl393	Signal
lin_rw_bank	mcntrl393	Signal
lin_rw_row	mcntrl393	Signal
lin_rw_col	mcntrl393	Signal
lin_rw_num128	mcntrl393	Signal
lin_rw_xfer_partial	mcntrl393	Signal
lin_rw_start_rd	mcntrl393	Signal
lin_rw_start_wr	mcntrl393	Signal
lin_rw_chn1_bank	mcntrl393	Signal
lin_rw_chn1_row	mcntrl393	Signal
lin_rw_chn1_col	mcntrl393	Signal
lin_rw_chn1_num128	mcntrl393	Signal
lin_rw_chn1_partial	mcntrl393	Signal
lin_rw_chn1_start_rd	mcntrl393	Signal
lin_rw_chn1_start_wr	mcntrl393	Signal
lin_rw_chn3_bank	mcntrl393	Signal
lin_rw_chn3_row	mcntrl393	Signal
lin_rw_chn3_col	mcntrl393	Signal
lin_rw_chn3_num128	mcntrl393	Signal
lin_rw_chn3_partial	mcntrl393	Signal
lin_rw_chn3_start_rd	mcntrl393	Signal
lin_rw_chn3_start_wr	mcntrl393	Signal
xfer_reset_page3_wr	mcntrl393	Signal
xfer_reset_page3_rd	mcntrl393	Signal
tiled_rw_bank	mcntrl393	Signal
tiled_rw_row	mcntrl393	Signal
tiled_rw_col	mcntrl393	Signal
tiled_rw_rowcol_inc	mcntrl393	Signal
last_in_burst_1	axibram_read	Signal
arvalid	axibram_read	Input
tiled_rw_num_rows_m1	mcntrl393	Signal
tiled_rw_num_cols_m1	mcntrl393	Signal
tiled_rw_keep_open	mcntrl393	Signal
tiled_rw_xfer_partial	mcntrl393	Signal
tiled_rw_chn2_bank	mcntrl393	Signal
tiled_rw_chn2_row	mcntrl393	Signal
tiled_rw_chn2_col	mcntrl393	Signal
tiled_rw_chn2_rowcol_inc	mcntrl393	Signal
tiled_rw_chn2_num_rows_m1	mcntrl393	Signal
tiled_rw_chn2_num_cols_m1	mcntrl393	Signal
tiled_rw_chn2_keep_open	mcntrl393	Signal
tiled_rw_chn2_xfer_partial	mcntrl393	Signal
tiled_rw_chn2_start_rd16	mcntrl393	Signal
tiled_rw_chn2_start_wr16	mcntrl393	Signal
tiled_rw_chn2_start_rd32	mcntrl393	Signal
tiled_rw_chn2_start_wr32	mcntrl393	Signal
xfer_reset_page2_wr	mcntrl393	Signal
xfer_reset_page2_rd	mcntrl393	Signal
tiled_rw_chn4_bank	mcntrl393	Signal
tiled_rw_chn4_row	mcntrl393	Signal
tiled_rw_chn4_col	mcntrl393	Signal
tiled_rw_chn4_rowcol_inc	mcntrl393	Signal
tiled_rw_chn4_num_rows_m1	mcntrl393	Signal
tiled_rw_chn4_num_cols_m1	mcntrl393	Signal
tiled_rw_chn4_keep_open	mcntrl393	Signal
tiled_rw_chn4_xfer_partial	mcntrl393	Signal
tiled_rw_chn4_start_rd16	mcntrl393	Signal
tiled_rw_chn4_start_wr16	mcntrl393	Signal
tiled_rw_chn4_start_rd32	mcntrl393	Signal
tiled_rw_chn4_start_wr32	mcntrl393	Signal
xfer_reset_page4_wr	mcntrl393	Signal
xfer_reset_page4_rd	mcntrl393	Signal
seq_data	mcntrl393	Signal
seq_wr	mcntrl393	Signal
seq_set	mcntrl393	Signal
encod_linear_start_out	mcntrl393	Signal
encod_linear_cmd	mcntrl393	Signal
encod_linear_wr	mcntrl393	Signal
encod_linear_done	mcntrl393	Signal
encod_tiled16_start_out	mcntrl393	Signal
encod_tiled16_cmd	mcntrl393	Signal
encod_tiled16_wr	mcntrl393	Signal
encod_tiled16_done	mcntrl393	Signal
encod_tiled32_start_out	mcntrl393	Signal
encod_tiled32_cmd	mcntrl393	Signal
encod_tiled32_wr	mcntrl393	Signal
encod_tiled32_done	mcntrl393	Signal
tiled_rw_start_rd16	mcntrl393	Signal
tiled_rw_start_wr16	mcntrl393	Signal
tiled_rw_start_rd32	mcntrl393	Signal
tiled_rw_start_wr32	mcntrl393	Signal
sens_first_wr_pending_r	mcntrl393	Signal
cmprs_first_rd_pending_r	mcntrl393	Signal
MCNTRL_TEST01_ADDR	mcntrl393_test01	Parameter
MCNTRL_TEST01_MASK	mcntrl393_test01	Parameter
FRAME_HEIGHT_BITS	mcntrl393_test01	Parameter
MCNTRL_TEST01_CHN1_MODE	mcntrl393_test01	Parameter
MCNTRL_TEST01_CHN1_STATUS_CNTRL	mcntrl393_test01	Parameter
MCNTRL_TEST01_CHN2_MODE	mcntrl393_test01	Parameter
MCNTRL_TEST01_CHN2_STATUS_CNTRL	mcntrl393_test01	Parameter
MCNTRL_TEST01_CHN3_MODE	mcntrl393_test01	Parameter
MCNTRL_TEST01_CHN3_STATUS_CNTRL	mcntrl393_test01	Parameter
MCNTRL_TEST01_CHN4_MODE	mcntrl393_test01	Parameter
MCNTRL_TEST01_CHN4_STATUS_CNTRL	mcntrl393_test01	Parameter
MCNTRL_TEST01_STATUS_REG_CHN1_ADDR	mcntrl393_test01	Parameter
MCNTRL_TEST01_STATUS_REG_CHN2_ADDR	mcntrl393_test01	Parameter
MCNTRL_TEST01_STATUS_REG_CHN3_ADDR	mcntrl393_test01	Parameter
MCNTRL_TEST01_STATUS_REG_CHN4_ADDR	mcntrl393_test01	Parameter
mrst	mcntrl393_test01	Input
mclk	mcntrl393_test01	Input
cmd_ad	mcntrl393_test01	Input
cmd_stb	mcntrl393_test01	Input
status_ad	mcntrl393_test01	Output
status_rq	mcntrl393_test01	Output
status_start	mcntrl393_test01	Input
frame_start_chn1	mcntrl393_test01	Output
next_page_chn1	mcntrl393_test01	Output
page_ready_chn1	mcntrl393_test01	Input
frame_done_chn1	mcntrl393_test01	Input
line_unfinished_chn1	mcntrl393_test01	Input
suspend_chn1	mcntrl393_test01	Output
frame_start_chn2	mcntrl393_test01	Output
next_page_chn2	mcntrl393_test01	Output
page_ready_chn2	mcntrl393_test01	Input
frame_done_chn2	mcntrl393_test01	Input
line_unfinished_chn2	mcntrl393_test01	Input
suspend_chn2	mcntrl393_test01	Output
frame_start_chn3	mcntrl393_test01	Output
next_page_chn3	mcntrl393_test01	Output
page_ready_chn3	mcntrl393_test01	Input
frame_done_chn3	mcntrl393_test01	Input
line_unfinished_chn3	mcntrl393_test01	Input
suspend_chn3	mcntrl393_test01	Output
frame_start_chn4	mcntrl393_test01	Output
next_page_chn4	mcntrl393_test01	Output
page_ready_chn4	mcntrl393_test01	Input
frame_done_chn4	mcntrl393_test01	Input
line_unfinished_chn4	mcntrl393_test01	Input
suspend_chn4	mcntrl393_test01	Output
PAGE_BITS	mcntrl393_test01	Parameter
last_in_burst_0	axibram_read	Signal
STATUS_PAYLOAD_BITS	mcntrl393_test01	Parameter
cmd_we	mcntrl393_test01	Signal
cmd_a	mcntrl393_test01	Signal
cmd_data	mcntrl393_test01	Signal
status_chn1	mcntrl393_test01	Signal
status_chn1_ad	mcntrl393_test01	Signal
status_chn1_rq	mcntrl393_test01	Signal
status_chn1_start	mcntrl393_test01	Signal
status_chn2	mcntrl393_test01	Signal
status_chn2_ad	mcntrl393_test01	Signal
MEMBRIDGE_ADDR	membridge	Parameter
status_chn2_rq	mcntrl393_test01	Signal
status_chn2_start	mcntrl393_test01	Signal
status_chn3	mcntrl393_test01	Signal
status_chn3_ad	mcntrl393_test01	Signal
status_chn3_rq	mcntrl393_test01	Signal
status_chn3_start	mcntrl393_test01	Signal
status_chn4	mcntrl393_test01	Signal
status_chn4_ad	mcntrl393_test01	Signal
status_chn4_rq	mcntrl393_test01	Signal
status_chn4_start	mcntrl393_test01	Signal
MEMBRIDGE_MASK	membridge	Parameter
page_chn1	mcntrl393_test01	Signal
page_chn2	mcntrl393_test01	Signal
page_chn3	mcntrl393_test01	Signal
page_chn4	mcntrl393_test01	Signal
frame_start_chn1_r	mcntrl393_test01	Signal
frame_start_chn2_r	mcntrl393_test01	Signal
frame_start_chn3_r	mcntrl393_test01	Signal
frame_start_chn4_r	mcntrl393_test01	Signal
next_page_chn1_r	mcntrl393_test01	Signal
next_page_chn2_r	mcntrl393_test01	Signal
MEMBRIDGE_CTRL	membridge	Parameter
next_page_chn3_r	mcntrl393_test01	Signal
next_page_chn4_r	mcntrl393_test01	Signal
suspend_chn1_r	mcntrl393_test01	Signal
suspend_chn2_r	mcntrl393_test01	Signal
suspend_chn3_r	mcntrl393_test01	Signal
suspend_chn4_r	mcntrl393_test01	Signal
set_chn1_mode	mcntrl393_test01	Signal
set_chn1_status	mcntrl393_test01	Signal
set_chn2_mode	mcntrl393_test01	Signal
set_chn2_status	mcntrl393_test01	Signal
MEMBRIDGE_STATUS_CNTRL	membridge	Parameter
set_chn3_mode	mcntrl393_test01	Signal
set_chn3_status	mcntrl393_test01	Signal
set_chn4_mode	mcntrl393_test01	Signal
set_chn4_status	mcntrl393_test01	Signal
cmd_frame_start_w	mcntrl393_test01	Signal
cmd_next_page_w	mcntrl393_test01	Signal
cmd_suspend_w	mcntrl393_test01	Signal
frame_busy_chn1	mcntrl393_test01	Signal
frame_busy_chn2	mcntrl393_test01	Signal
frame_busy_chn3	mcntrl393_test01	Signal
MEMBRIDGE_LO_ADDR64	membridge	Parameter
frame_busy_chn4	mcntrl393_test01	Signal
frame_finished_chn1	mcntrl393_test01	Signal
frame_finished_chn2	mcntrl393_test01	Signal
frame_finished_chn3	mcntrl393_test01	Signal
frame_finished_chn4	mcntrl393_test01	Signal
MEMBRIDGE_SIZE64	membridge	Parameter
MEMBRIDGE_START64	membridge	Parameter
MEMBRIDGE_LEN64	membridge	Parameter
LOG2WIDTH_RD	mcntrl_buf_rd	Parameter
ext_clk	mcntrl_buf_rd	Input
ext_raddr	mcntrl_buf_rd	Input
ext_rd	mcntrl_buf_rd	Input
ext_regen	mcntrl_buf_rd	Input
ext_data_out	mcntrl_buf_rd	Output
wclk	mcntrl_buf_rd	Input
MEMBRIDGE_WIDTH64	membridge	Parameter
wpage_in	mcntrl_buf_rd	Input
wpage_set	mcntrl_buf_rd	Input
page_next	mcntrl_buf_rd	Input
page	mcntrl_buf_rd	Output
we	mcntrl_buf_rd	Input
data_in	mcntrl_buf_rd	Input
page_r	mcntrl_buf_rd	Signal
waddr	mcntrl_buf_rd	Signal
LOG2WIDTH_WR	mcntrl_buf_wr	Parameter
ext_clk	mcntrl_buf_wr	Input
MEMBRIDGE_MODE	membridge	Parameter
start_read_burst_0	axibram_read	Signal
ext_waddr	mcntrl_buf_wr	Input
ext_we	mcntrl_buf_wr	Input
ext_data_in	mcntrl_buf_wr	Input
rclk	mcntrl_buf_wr	Input
rpage_in	mcntrl_buf_wr	Input
rpage_set	mcntrl_buf_wr	Input
page_next	mcntrl_buf_wr	Input
page	mcntrl_buf_wr	Output
rd	mcntrl_buf_wr	Input
data_out	mcntrl_buf_wr	Output
MEMBRIDGE_STATUS_REG	membridge	Parameter
page_r	mcntrl_buf_wr	Signal
raddr	mcntrl_buf_wr	Signal
regen	mcntrl_buf_wr	Signal
FRAME_HEIGHT_BITS	membridge	Parameter
522	membridge	Parameter
523	membridge	Parameter
mrst	membridge	Input
hrst	membridge	Input
mclk	membridge	Input
hclk	membridge	Input
cmd_ad	membridge	Input
cmd_stb	membridge	Input
start_read_burst_1	axibram_read	Signal
status_ad	membridge	Output
status_rq	membridge	Output
status_start	membridge	Input
frame_start_chn	membridge	Output
next_page_chn	membridge	Output
cmd_wrmem	membridge	Input
page_ready_chn	membridge	Input
frame_done_chn	membridge	Input
line_unfinished_chn1	membridge	Input
suspend_chn1	membridge	Output
pre_rid0	axibram_read	Signal
xfer_reset_page_rd	membridge	Input
buf_wpage_nxt	membridge	Input
buf_wr	membridge	Input
buf_wdata	membridge	Input
xfer_reset_page_wr	membridge	Input
buf_rpage_nxt	membridge	Input
buf_rd	membridge	Input
buf_rdata	membridge	Output
afi_awaddr	membridge	Output
afi_awvalid	membridge	Output
pre_rid	axibram_read	Signal
afi_awready	membridge	Input
afi_awid	membridge	Output
afi_awlock	membridge	Output
afi_awcache	membridge	Output
afi_awprot	membridge	Output
afi_awlen	membridge	Output
afi_awsize	membridge	Output
afi_awburst	membridge	Output
afi_awqos	membridge	Output
afi_wdata	membridge	Output
bram_regen_r	axibram_read	Signal
afi_wvalid	membridge	Output
afi_wready	membridge	Input
afi_wid	membridge	Output
afi_wlast	membridge	Output
afi_wstrb	membridge	Output
afi_bvalid	membridge	Input
afi_bready	membridge	Output
afi_bid	membridge	Input
afi_bresp	membridge	Input
afi_wcount	membridge	Input
ADDRESS_BITS	axibram_write	Parameter
afi_wacount	membridge	Input
afi_wrissuecap1en	membridge	Output
afi_araddr	membridge	Output
afi_arvalid	membridge	Output
afi_arready	membridge	Input
afi_arid	membridge	Output
afi_arlock	membridge	Output
afi_arcache	membridge	Output
afi_arprot	membridge	Output
afi_arlen	membridge	Output
aclk	axibram_write	Input
afi_arsize	membridge	Output
afi_arburst	membridge	Output
afi_arqos	membridge	Output
afi_rdata	membridge	Input
afi_rvalid	membridge	Input
afi_rready	membridge	Output
afi_rid	membridge	Input
afi_rlast	membridge	Input
afi_rresp	membridge	Input
afi_rcount	membridge	Input
arst	axibram_write	Input
afi_racount	membridge	Input
afi_rdissuecap1en	membridge	Output
debug_do	membridge	Output
debug_sl	membridge	Input
debug_di	membridge	Input
BUFWR_WE_WIDTH	membridge	Parameter
SAFE_RD_BITS	membridge	Parameter
cmd_a	membridge	Signal
cmd_data	membridge	Signal
cmd_we	membridge	Signal
awaddr	axibram_write	Input
arready	axibram_read	Output
set_ctrl_w	membridge	Signal
set_status_w	membridge	Signal
set_lo_addr64_w	membridge	Signal
set_size64_w	membridge	Signal
set_start64_w	membridge	Signal
set_len64_w	membridge	Signal
set_mode_w	membridge	Signal
set_width64_w	membridge	Signal
mode_reg_mclk	membridge	Signal
mode_reg	membridge	Signal
awvalid	axibram_write	Input
cache_debug	membridge	Signal
lo_addr64_mclk	membridge	Signal
size64_mclk	membridge	Signal
start64_mclk	membridge	Signal
len64_mclk	membridge	Signal
width64_mclk	membridge	Signal
width64_minus1_mclk	membridge	Signal
rdwr_en_mclk	membridge	Signal
rdwr_reset_addr_mclk	membridge	Signal
start_mclk	membridge	Signal
awready	axibram_write	Output
lo_addr64	membridge	Signal
size64	membridge	Signal
start64	membridge	Signal
len64	membridge	Signal
last_in_line64	membridge	Signal
last_addr1k	membridge	Signal
rdwr_en	membridge	Signal
rdwr_reset_addr	membridge	Signal
start_hclk	membridge	Signal
rd_start	membridge	Signal
awid	axibram_write	Input
wr_start	membridge	Signal
rdwr_start	membridge	Signal
wr_mode	membridge	Signal
page_ready	membridge	Signal
frame_done	membridge	Signal
reset_page_wr	membridge	Signal
reset_page_rd	membridge	Signal
page_ready_rd	membridge	Signal
page_ready_wr	membridge	Signal
next_page_rd	membridge	Signal
awlen	axibram_write	Input
next_page_wr	membridge	Signal
next_page	membridge	Signal
rd_id	membridge	Signal
wr_id	membridge	Signal
read_no_more	membridge	Signal
mrstn	membridge	Signal
DELAY_ADVANCE_ADDR	membridge	Parameter
rel_addr64	membridge	Signal
advance_rel_addr_w	membridge	Signal
advance_rel_addr_wr	membridge	Signal
awsize	axibram_write	Input
advance_rel_addr_rd	membridge	Signal
advance_rel_addr	membridge	Signal
advance_rel_addr_d	membridge	Signal
left64	membridge	Signal
last_burst	membridge	Signal
rollover	membridge	Signal
afi_len	membridge	Signal
afi_len_plus1	membridge	Signal
low4_zero	membridge	Signal
buf_left64	membridge	Signal
awburst	axibram_write	Input
buf_in_line64	membridge	Signal
axi_addr64	membridge	Signal
left_zero	membridge	Signal
read_started	membridge	Signal
write_busy	membridge	Signal
rw_in_progress	membridge	Signal
busy	membridge	Signal
done	membridge	Signal
pre_done	membridge	Signal
axi_arw_requested	membridge	Signal
wdata	axibram_write	Input
axi_bursts_requested	membridge	Signal
wresp_conf	membridge	Signal
axi_wr_pending	membridge	Signal
axi_wr_left	membridge	Signal
axi_rd_pending	membridge	Signal
axi_rd_received	membridge	Signal
read_busy	membridge	Signal
read_over	membridge	Signal
afi_bvalid_r	membridge	Signal
read_page	membridge	Signal
wvalid	axibram_write	Input
read_pages_ready	membridge	Signal
afi_wd_safe_not_full	membridge	Signal
afi_wa_safe_not_full	membridge	Signal
bufrd_rd_w	membridge	Signal
bufwr_we_w	membridge	Signal
bufrd_rd	membridge	Signal
bufwr_we	membridge	Signal
buf_rdwr	membridge	Signal
is_last_in_line	membridge	Signal
is_last_in_page	membridge	Signal
wready	axibram_write	Output
next_page_rd_w	membridge	Signal
next_page_wr_w	membridge	Signal
done_page_rd_w	membridge	Signal
safe_some_left_rd_w	membridge	Signal
left_was_1	membridge	Signal
left_many	membridge	Signal
src_wcntr	membridge	Signal
wlast	membridge	Signal
src_was_f	membridge	Signal
afi_rd_safe_not_empty	membridge	Signal
wid	axibram_write	Input
arid	axibram_read	Input
afi_ra_safe_not_full	membridge	Signal
afi_safe_rd_pending	membridge	Signal
write_page	membridge	Signal
write_pages_ready	membridge	Signal
write_page_r	membridge	Signal
buf_in_line64_r	membridge	Signal
dbg_read_counter	membridge	Signal
rdata_r	membridge	Signal
afi_wdata0	membridge	Signal
dbg_write_counter	membridge	Signal
wlast	axibram_write	Input
wstb	axibram_write	Input
bvalid	axibram_write	Output
bready	axibram_write	Input
bid	axibram_write	Output
MULT_SAXI_ADDR	mult_saxi_wr	Parameter
MULT_SAXI_CNTRL_ADDR	mult_saxi_wr	Parameter
MULT_SAXI_STATUS_REG	mult_saxi_wr	Parameter
MULT_SAXI_HALF_BRAM	mult_saxi_wr	Parameter
MULT_SAXI_BSLOG0	mult_saxi_wr	Parameter
MULT_SAXI_BSLOG1	mult_saxi_wr	Parameter
MULT_SAXI_BSLOG2	mult_saxi_wr	Parameter
MULT_SAXI_BSLOG3	mult_saxi_wr	Parameter
MULT_SAXI_MASK	mult_saxi_wr	Parameter
MULT_SAXI_CNTRL_MASK	mult_saxi_wr	Parameter
bresp	axibram_write	Output
MULT_SAXI_AWCACHE	mult_saxi_wr	Parameter
MULT_SAXI_ADV_WR	mult_saxi_wr	Parameter
MULT_SAXI_ADV_RD	mult_saxi_wr	Parameter
mclk	mult_saxi_wr	Input
aclk	mult_saxi_wr	Input
mrst	mult_saxi_wr	Input
arst	mult_saxi_wr	Input
cmd_ad	mult_saxi_wr	Input
cmd_stb	mult_saxi_wr	Input
status_ad	mult_saxi_wr	Output
pre_awaddr	axibram_write	Output
status_rq	mult_saxi_wr	Output
status_start	mult_saxi_wr	Input
en_chn0	mult_saxi_wr	Output
has_burst0	mult_saxi_wr	Input
read_burst0	mult_saxi_wr	Output
data_in_chn0	mult_saxi_wr	Input
pre_valid_chn0	mult_saxi_wr	Input
en_chn1	mult_saxi_wr	Output
has_burst1	mult_saxi_wr	Input
read_burst1	mult_saxi_wr	Output
start_burst	axibram_write	Output
data_in_chn1	mult_saxi_wr	Input
pre_valid_chn1	mult_saxi_wr	Input
en_chn2	mult_saxi_wr	Output
has_burst2	mult_saxi_wr	Input
read_burst2	mult_saxi_wr	Output
data_in_chn2	mult_saxi_wr	Input
pre_valid_chn2	mult_saxi_wr	Input
en_chn3	mult_saxi_wr	Output
has_burst3	mult_saxi_wr	Input
read_burst3	mult_saxi_wr	Output
dev_ready	axibram_write	Input
data_in_chn3	mult_saxi_wr	Input
pre_valid_chn3	mult_saxi_wr	Input
saxi_awaddr	mult_saxi_wr	Output
saxi_awvalid	mult_saxi_wr	Output
saxi_awready	mult_saxi_wr	Input
saxi_awid	mult_saxi_wr	Output
saxi_awlock	mult_saxi_wr	Output
saxi_awcache	mult_saxi_wr	Output
saxi_awprot	mult_saxi_wr	Output
saxi_awlen	mult_saxi_wr	Output
bram_wclk	axibram_write	Output
arlen	axibram_read	Input
saxi_awsize	mult_saxi_wr	Output
saxi_awburst	mult_saxi_wr	Output
saxi_awqos	mult_saxi_wr	Output
saxi_wdata	mult_saxi_wr	Output
saxi_wvalid	mult_saxi_wr	Output
saxi_wready	mult_saxi_wr	Input
saxi_wid	mult_saxi_wr	Output
saxi_wlast	mult_saxi_wr	Output
saxi_wstrb	mult_saxi_wr	Output
saxi_bvalid	mult_saxi_wr	Input
bram_waddr	axibram_write	Output
saxi_bready	mult_saxi_wr	Output
saxi_bid	mult_saxi_wr	Input
saxi_bresp	mult_saxi_wr	Input
BRAM_A_WDTH	mult_saxi_wr	Parameter
CHN_A_WDTH	mult_saxi_wr	Parameter
en_chn_mclk	mult_saxi_wr	Signal
run_chn_mclk	mult_saxi_wr	Signal
mode_reg	mult_saxi_wr	Signal
en_mclk	mult_saxi_wr	Signal
en_chn_aclk	mult_saxi_wr	Signal
pre_bram_wen	axibram_write	Output
en_aclk	mult_saxi_wr	Signal
rq_wr	mult_saxi_wr	Signal
grant_wr	mult_saxi_wr	Signal
wa_chn	mult_saxi_wr	Signal
adv_wr_done	mult_saxi_wr	Signal
rq_out_chn	mult_saxi_wr	Signal
ra_chn	mult_saxi_wr	Signal
pre_re	mult_saxi_wr	Signal
en_we_arb	mult_saxi_wr	Signal
we_grant	mult_saxi_wr	Signal
bram_wen	axibram_write	Output
we_cur_chn	mult_saxi_wr	Signal
data_in	mult_saxi_wr	Signal
pre_valid	mult_saxi_wr	Signal
valid	mult_saxi_wr	Signal
buf_wa	mult_saxi_wr	Signal
buf_wd	mult_saxi_wr	Signal
buf_we	mult_saxi_wr	Signal
grant_rd	mult_saxi_wr	Signal
grant_rd_any	mult_saxi_wr	Signal
en_out_arb	mult_saxi_wr	Signal
bram_wstb	axibram_write	Output
re_cur_chn	mult_saxi_wr	Signal
buf_ra	mult_saxi_wr	Signal
inter_buf_data	mult_saxi_wr	Signal
buf_re	mult_saxi_wr	Signal
fifo_half_full	mult_saxi_wr	Signal
SENSOR_GROUP_ADDR	sensors393	Parameter
SENSOR_BASE_INC	sensors393	Parameter
HIST_SAXI_ADDR_REL	sensors393	Parameter
HIST_SAXI_MODE_ADDR_REL	sensors393	Parameter
fifo_nempty	mult_saxi_wr	Signal
SENSI2C_STATUS_REG_BASE	sensors393	Parameter
SENSI2C_STATUS_REG_INC	sensors393	Parameter
SENSI2C_STATUS_REG_REL	sensors393	Parameter
SENSIO_STATUS_REG_REL	sensors393	Parameter
SENSOR_NUM_HISTOGRAM	sensors393	Parameter
HISTOGRAM_RAM_MODE	sensors393	Parameter
SENS_NUM_SUBCHN	sensors393	Parameter
SENS_GAMMA_BUFFER	sensors393	Parameter
SENSOR_CTRL_RADDR	sensors393	Parameter
SENSOR_CTRL_ADDR_MASK	sensors393	Parameter
wdata_busy_chn	mult_saxi_wr	Signal
SENSOR_MODE_WIDTH	sensors393	Parameter
SENSOR_HIST_EN_BITS	sensors393	Parameter
SENSOR_HIST_NRST_BITS	sensors393	Parameter
SENSOR_CHN_EN_BIT	sensors393	Parameter
SENSOR_16BIT_BIT	sensors393	Parameter
SENSI2C_CTRL_RADDR	sensors393	Parameter
SENSI2C_CTRL_MASK	sensors393	Parameter
SENSI2C_CTRL	sensors393	Parameter
SENSI2C_CMD_TABLE	sensors393	Parameter
SENSI2C_CMD_TAND	sensors393	Parameter
first_re	mult_saxi_wr	Signal
SENSI2C_CMD_RESET	sensors393	Parameter
SENSI2C_CMD_RUN	sensors393	Parameter
SENSI2C_CMD_RUN_PBITS	sensors393	Parameter
SENSI2C_CMD_SOFT_SDA	sensors393	Parameter
SENSI2C_CMD_SOFT_SCL	sensors393	Parameter
SENSI2C_CMD_FIFO_RD	sensors393	Parameter
SENSI2C_CMD_ACIVE	sensors393	Parameter
SENSI2C_CMD_ACIVE_EARLY0	sensors393	Parameter
SENSI2C_CMD_ACIVE_SDA	sensors393	Parameter
SENSI2C_TBL_RAH	sensors393	Parameter
last_re	mult_saxi_wr	Signal
SENSI2C_TBL_RAH_BITS	sensors393	Parameter
SENSI2C_TBL_RNWREG	sensors393	Parameter
SENSI2C_TBL_SA	sensors393	Parameter
SENSI2C_TBL_SA_BITS	sensors393	Parameter
SENSI2C_TBL_NBWR	sensors393	Parameter
SENSI2C_TBL_NBWR_BITS	sensors393	Parameter
SENSI2C_TBL_NBRD	sensors393	Parameter
SENSI2C_TBL_NBRD_BITS	sensors393	Parameter
SENSI2C_TBL_NABRD	sensors393	Parameter
SENSI2C_TBL_DLY	sensors393	Parameter
cmd_a	mult_saxi_wr	Signal
bram_wdata	axibram_write	Output
SENSI2C_TBL_DLY_BITS	sensors393	Parameter
SENSI2C_STATUS	sensors393	Parameter
SENS_SYNC_RADDR	sensors393	Parameter
SENS_SYNC_MASK	sensors393	Parameter
SENS_SYNC_MULT	sensors393	Parameter
SENS_SYNC_LATE	sensors393	Parameter
SENS_GAMMA_RADDR	sensors393	Parameter
SENS_GAMMA_ADDR_MASK	sensors393	Parameter
SENS_GAMMA_CTRL	sensors393	Parameter
SENS_GAMMA_ADDR_DATA	sensors393	Parameter
cmd_data	mult_saxi_wr	Signal
SENS_GAMMA_HEIGHT01	sensors393	Parameter
SENS_GAMMA_HEIGHT2	sensors393	Parameter
SENS_GAMMA_MODE_WIDTH	sensors393	Parameter
SENS_GAMMA_MODE_BAYER	sensors393	Parameter
SENS_GAMMA_MODE_PAGE	sensors393	Parameter
SENS_GAMMA_MODE_EN	sensors393	Parameter
SENS_GAMMA_MODE_REPET	sensors393	Parameter
SENS_GAMMA_MODE_TRIG	sensors393	Parameter
SENS_LENS_RADDR	sensors393	Parameter
SENS_LENS_ADDR_MASK	sensors393	Parameter
we_ctrl	mult_saxi_wr	Signal
SENS_LENS_COEFF	sensors393	Parameter
SENS_LENS_AX	sensors393	Parameter
SENS_LENS_AX_MASK	sensors393	Parameter
SENS_LENS_AY	sensors393	Parameter
SENS_LENS_AY_MASK	sensors393	Parameter
SENS_LENS_C	sensors393	Parameter
SENS_LENS_C_MASK	sensors393	Parameter
SENS_LENS_BX	sensors393	Parameter
SENS_LENS_BX_MASK	sensors393	Parameter
SENS_LENS_BY	sensors393	Parameter
cmd_we_sa_len	mult_saxi_wr	Signal
SENS_LENS_BY_MASK	sensors393	Parameter
SENS_LENS_SCALES	sensors393	Parameter
SENS_LENS_SCALES_MASK	sensors393	Parameter
SENS_LENS_FAT0_IN	sensors393	Parameter
SENS_LENS_FAT0_IN_MASK	sensors393	Parameter
SENS_LENS_FAT0_OUT	sensors393	Parameter
SENS_LENS_FAT0_OUT_MASK	sensors393	Parameter
SENS_LENS_POST_SCALE	sensors393	Parameter
SENS_LENS_POST_SCALE_MASK	sensors393	Parameter
SENSIO_RADDR	sensors393	Parameter
pre_pre_buf_we	mult_saxi_wr	Signal
SENSIO_ADDR_MASK	sensors393	Parameter
SENSIO_CTRL	sensors393	Parameter
SENS_CTRL_MRST	sensors393	Parameter
SENS_CTRL_ARST	sensors393	Parameter
SENS_CTRL_ARO	sensors393	Parameter
SENS_CTRL_RST_MMCM	sensors393	Parameter
SENS_CTRL_IGNORE_EMBED	sensors393	Parameter
SENS_CTRL_LD_DLY	sensors393	Parameter
SENS_CTRL_GP0	sensors393	Parameter
SENS_CTRL_GP1	sensors393	Parameter
pre_buf_we	mult_saxi_wr	Signal
SENSIO_STATUS	sensors393	Parameter
SENSIO_JTAG	sensors393	Parameter
SENS_JTAG_PGMEN	sensors393	Parameter
SENS_JTAG_PROG	sensors393	Parameter
SENS_JTAG_TCK	sensors393	Parameter
SENS_JTAG_TMS	sensors393	Parameter
SENS_JTAG_TDI	sensors393	Parameter
SENSIO_DELAYS	sensors393	Parameter
SENSI2C_ABS_RADDR	sensors393	Parameter
SENSI2C_REL_RADDR	sensors393	Parameter
chn_wr	mult_saxi_wr	Signal
SENSI2C_ADDR_MASK	sensors393	Parameter
HISTOGRAM_RADDR0	sensors393	Parameter
HISTOGRAM_RADDR1	sensors393	Parameter
HISTOGRAM_RADDR2	sensors393	Parameter
HISTOGRAM_RADDR3	sensors393	Parameter
HISTOGRAM_ADDR_MASK	sensors393	Parameter
HISTOGRAM_LEFT_TOP	sensors393	Parameter
HISTOGRAM_WIDTH_HEIGHT	sensors393	Parameter
SENSI2C_DRIVE	sensors393	Parameter
SENSI2C_IBUF_LOW_PWR	sensors393	Parameter
chn_rd	mult_saxi_wr	Signal
SENSI2C_SLEW	sensors393	Parameter
HIST_SAXI_ADDR_MASK	sensors393	Parameter
HIST_SAXI_MODE_WIDTH	sensors393	Parameter
HIST_SAXI_EN	sensors393	Parameter
HIST_SAXI_NRESET	sensors393	Parameter
HIST_CONFIRM_WRITE	sensors393	Parameter
HIST_SAXI_AWCACHE	sensors393	Parameter
HIST_SAXI_MODE_ADDR_MASK	sensors393	Parameter
NUM_FRAME_BITS	sensors393	Parameter
SENS_SYNC_FBITS	sensors393	Parameter
chn_rd_data	mult_saxi_wr	Signal
SENS_SYNC_LBITS	sensors393	Parameter
SENS_SYNC_LATE_DFLT	sensors393	Parameter
SENS_SYNC_MINBITS	sensors393	Parameter
SENS_SYNC_MINPER	sensors393	Parameter
IDELAY_VALUE	sensors393	Parameter
PXD_DRIVE	sensors393	Parameter
PXD_IBUF_LOW_PWR	sensors393	Parameter
PXD_SLEW	sensors393	Parameter
SENS_REFCLK_FREQUENCY	sensors393	Parameter
SENS_HIGH_PERFORMANCE_MODE	sensors393	Parameter
pre_first_rd_valid	mult_saxi_wr	Signal
PXD_CAPACITANCE	sensors393	Parameter
PXD_CLK_DIV	sensors393	Parameter
PXD_CLK_DIV_BITS	sensors393	Parameter
SENS_PHASE_WIDTH	sensors393	Parameter
SENS_BANDWIDTH	sensors393	Parameter
CLKIN_PERIOD_SENSOR	sensors393	Parameter
CLKFBOUT_MULT_SENSOR	sensors393	Parameter
CLKFBOUT_PHASE_SENSOR	sensors393	Parameter
IPCLK_PHASE	sensors393	Parameter
IPCLK2X_PHASE	sensors393	Parameter
is_last_rd	mult_saxi_wr	Signal
aw_nempty	axibram_write	Signal
PXD_IOSTANDARD	sensors393	Parameter
SENSI2C_IOSTANDARD	sensors393	Parameter
BUF_IPCLK_SENS0	sensors393	Parameter
BUF_IPCLK2X_SENS0	sensors393	Parameter
BUF_IPCLK_SENS1	sensors393	Parameter
BUF_IPCLK2X_SENS1	sensors393	Parameter
BUF_IPCLK_SENS2	sensors393	Parameter
BUF_IPCLK2X_SENS2	sensors393	Parameter
BUF_IPCLK_SENS3	sensors393	Parameter
BUF_IPCLK2X_SENS3	sensors393	Parameter
chn_fifo_out	mult_saxi_wr	Signal
SENS_DIVCLK_DIVIDE	sensors393	Parameter
SENS_REF_JITTER1	sensors393	Parameter
SENS_REF_JITTER2	sensors393	Parameter
SENS_SS_EN	sensors393	Parameter
SENS_SS_MODE	sensors393	Parameter
8615	sensors393	Parameter
HISPI_MSB_FIRST	sensors393	Parameter
HISPI_NUMLANES	sensors393	Parameter
HISPI_DELAY_CLK0	sensors393	Parameter
HISPI_DELAY_CLK1	sensors393	Parameter
axi_ptr_busy	mult_saxi_wr	Signal
HISPI_DELAY_CLK2	sensors393	Parameter
HISPI_DELAY_CLK3	sensors393	Parameter
HISPI_MMCM0	sensors393	Parameter
HISPI_MMCM1	sensors393	Parameter
HISPI_MMCM2	sensors393	Parameter
HISPI_MMCM3	sensors393	Parameter
HISPI_KEEP_IRST	sensors393	Parameter
HISPI_WAIT_ALL_LANES	sensors393	Parameter
HISPI_FIFO_DEPTH	sensors393	Parameter
HISPI_FIFO_START	sensors393	Parameter
axi_addr	mult_saxi_wr	Signal
HISPI_CAPACITANCE	sensors393	Parameter
HISPI_DIFF_TERM	sensors393	Parameter
HISPI_UNTUNED_SPLIT	sensors393	Parameter
HISPI_DQS_BIAS	sensors393	Parameter
HISPI_IBUF_DELAY_VALUE	sensors393	Parameter
HISPI_IBUF_LOW_PWR	sensors393	Parameter
HISPI_IFD_DELAY_VALUE	sensors393	Parameter
8637	sensors393	Parameter
8638	sensors393	Parameter
pclk	sensors393	Input
axi_len	mult_saxi_wr	Signal
ref_clk	sensors393	Input
dly_rst	sensors393	Input
mrst	sensors393	Input
prst	sensors393	Input
arst	sensors393	Input
mclk	sensors393	Input
cmd_ad_in	sensors393	Input
cmd_stb_in	sensors393	Input
status_ad	sensors393	Output
status_rq	sensors393	Output
pntr_wd	mult_saxi_wr	Signal
status_start	sensors393	Input
sns_dp	sensors393	Input
sns_dn	sensors393	Input
sns_dp74	sensors393	Inout
sns_dn74	sensors393	Inout
sns_clkp	sensors393	Input
sns_clkn	sensors393	Input
sns_scl	sensors393	Inout
sns_sda	sensors393	Inout
sns_ctl	sensors393	Inout
pntr_wa	mult_saxi_wr	Signal
sns_pg	sensors393	Inout
frame_run_mclk	sensors393	Input
rpage_set	sensors393	Input
rpage_next	sensors393	Input
buf_rd	sensors393	Input
buf_dout	sensors393	Output
page_written	sensors393	Output
trigger_mode	sensors393	Input
trig_in	sensors393	Input
sof_out_pclk	sensors393	Output
pntr_we	mult_saxi_wr	Signal
eof_out_pclk	sensors393	Output
sof_out_mclk	sensors393	Output
sof_late_mclk	sensors393	Output
frame_num0	sensors393	Input
frame_num1	sensors393	Input
frame_num2	sensors393	Input
frame_num3	sensors393	Input
idelay_rdy	sensors393	Output
aclk	sensors393	Input
saxi_awaddr	sensors393	Output
awvalid	mult_saxi_wr	Signal
saxi_awvalid	sensors393	Output
saxi_awready	sensors393	Input
saxi_awid	sensors393	Output
saxi_awlock	sensors393	Output
saxi_awcache	sensors393	Output
saxi_awprot	sensors393	Output
saxi_awlen	sensors393	Output
saxi_awsize	sensors393	Output
saxi_awburst	sensors393	Output
saxi_awqos	sensors393	Output
aw_seq	mult_saxi_wr	Signal
saxi_wdata	sensors393	Output
saxi_wvalid	sensors393	Output
saxi_wready	sensors393	Input
saxi_wid	sensors393	Output
saxi_wlast	sensors393	Output
saxi_wstrb	sensors393	Output
saxi_bvalid	sensors393	Input
saxi_bready	sensors393	Output
saxi_bid	sensors393	Input
saxi_bresp	sensors393	Input
chn_out	mult_saxi_wr	Signal
aw_half_full	axibram_write	Signal
debug_do	sensors393	Output
debug_sl	sensors393	Input
debug_di	sensors393	Input
DEBUG_RING_LENGTH	sensors393	Parameter
debug_ring	sensors393	Signal
idelay_ctrl_rdy	sensors393	Signal
cmd_ad	sensors393	Signal
cmd_stb	sensors393	Signal
status_ad_chn	sensors393	Signal
status_rq_chn	sensors393	Signal
fifo_re	mult_saxi_wr	Signal
status_start_chn	sensors393	Signal
px_data	sensors393	Signal
px_valid	sensors393	Signal
last_in_line	sensors393	Signal
hist_request	sensors393	Signal
hist_grant	sensors393	Signal
hist_chn	sensors393	Signal
hist_dvalid	sensors393	Signal
hist_data	sensors393	Signal
frame_num	sensors393	Signal
status_pntr0	mult_saxi_wr	Signal
status_pntr1	mult_saxi_wr	Signal
status_pntr2	mult_saxi_wr	Signal
status_pntr3	mult_saxi_wr	Signal
pntr_we_mclk	mult_saxi_wr	Signal
status_data	mult_saxi_wr	Signal
status_tgl	mult_saxi_wr	Signal
MULT_SAXI_HALF_BRAM_IN	mult_saxi_wr_inbuf	Parameter
MULT_SAXI_BSLOG	mult_saxi_wr_inbuf	Parameter
awburst_out	axibram_write	Signal
MULT_SAXI_WLOG	mult_saxi_wr_inbuf	Parameter
mclk	mult_saxi_wr_inbuf	Input
en	mult_saxi_wr_inbuf	Input
iclk	mult_saxi_wr_inbuf	Input
data_in	mult_saxi_wr_inbuf	Input
valid	mult_saxi_wr_inbuf	Input
has_burst	mult_saxi_wr_inbuf	Output
read_burst	mult_saxi_wr_inbuf	Input
data_out	mult_saxi_wr_inbuf	Output
pre_valid_chn	mult_saxi_wr_inbuf	Output
awsize_out	axibram_write	Signal
INA_WIDTH	mult_saxi_wr_inbuf	Parameter
OUTA_WIDTH	mult_saxi_wr_inbuf	Parameter
INW_CNTR_WIDTH	mult_saxi_wr_inbuf	Parameter
OUTW_CNTR_WIDTH	mult_saxi_wr_inbuf	Parameter
BURST_WIDTH	mult_saxi_wr_inbuf	Parameter
en_iclk	mult_saxi_wr_inbuf	Signal
inw_cntr	mult_saxi_wr_inbuf	Signal
in_burst	mult_saxi_wr_inbuf	Signal
outw_cntr	mult_saxi_wr_inbuf	Signal
out_burst	mult_saxi_wr_inbuf	Signal
awlen_out	axibram_write	Signal
arsize	axibram_read	Input
num_out_bursts	mult_saxi_wr_inbuf	Signal
waddr	mult_saxi_wr_inbuf	Signal
raddr	mult_saxi_wr_inbuf	Signal
put_burst_mclk	mult_saxi_wr_inbuf	Signal
wr_last_word	mult_saxi_wr_inbuf	Signal
re_last_word	mult_saxi_wr_inbuf	Signal
buf_re	mult_saxi_wr_inbuf	Signal
awaddr_out	axibram_write	Signal
awid_out	axibram_write	Signal
w_nempty	axibram_write	Signal
w_half_full	axibram_write	Signal
wdata_out	axibram_write	Signal
wlast_out	axibram_write	Signal
RTC_ADDR	timing393	Parameter
CAMSYNC_ADDR	timing393	Parameter
RTC_STATUS_REG_ADDR	timing393	Parameter
RTC_SEC_USEC_ADDR	timing393	Parameter
RTC_MASK	timing393	Parameter
CAMSYNC_MASK	timing393	Parameter
CAMSYNC_MODE	timing393	Parameter
CAMSYNC_TRIG_SRC	timing393	Parameter
CAMSYNC_TRIG_DST	timing393	Parameter
CAMSYNC_TRIG_PERIOD	timing393	Parameter
CAMSYNC_TRIG_DELAY0	timing393	Parameter
CAMSYNC_TRIG_DELAY1	timing393	Parameter
CAMSYNC_TRIG_DELAY2	timing393	Parameter
CAMSYNC_TRIG_DELAY3	timing393	Parameter
CAMSYNC_EN_BIT	timing393	Parameter
CAMSYNC_SNDEN_BIT	timing393	Parameter
CAMSYNC_EXTERNAL_BIT	timing393	Parameter
CAMSYNC_TRIGGERED_BIT	timing393	Parameter
CAMSYNC_MASTER_BIT	timing393	Parameter
CAMSYNC_CHN_EN_BIT	timing393	Parameter
CAMSYNC_PRE_MAGIC	timing393	Parameter
CAMSYNC_POST_MAGIC	timing393	Parameter
RTC_MHZ	timing393	Parameter
RTC_BITC_PREDIV	timing393	Parameter
RTC_SET_USEC	timing393	Parameter
RTC_SET_SEC	timing393	Parameter
RTC_SET_CORR	timing393	Parameter
RTC_SET_STATUS	timing393	Parameter
mclk	timing393	Input
pclk	timing393	Input
mrst	timing393	Input
prst	timing393	Input
refclk	timing393	Input
cmd_ad	timing393	Input
cmd_stb	timing393	Input
status_ad	timing393	Output
status_rq	timing393	Output
status_start	timing393	Input
gpio_in	timing393	Input
gpio_out	timing393	Output
gpio_out_en	timing393	Output
triggered_mode	timing393	Output
frsync_chn0	timing393	Input
trig_chn0	timing393	Output
frsync_chn1	timing393	Input
trig_chn1	timing393	Output
frsync_chn2	timing393	Input
trig_chn2	timing393	Output
wstb_out	axibram_write	Signal
frsync_chn3	timing393	Input
trig_chn3	timing393	Output
ts_stb_chn0	timing393	Output
ts_data_chn0	timing393	Output
ts_stb_chn1	timing393	Output
ts_data_chn1	timing393	Output
ts_stb_chn2	timing393	Output
ts_data_chn2	timing393	Output
ts_stb_chn3	timing393	Output
ts_data_chn3	timing393	Output
lclk	timing393	Input
lrst	timing393	Input
ts_logger_snap	timing393	Input
ts_logger_stb	timing393	Output
ts_logger_data	timing393	Output
frame_sync	timing393	Signal
trig	timing393	Signal
ts_local_snap	timing393	Signal
ts_local_stb	timing393	Signal
ts_local_data	timing393	Signal
ts_stb	timing393	Signal
ts_data	timing393	Signal
live_sec	timing393	Signal
live_usec	timing393	Signal
wid_out	axibram_write	Signal
CLK_ADDR	clocks393m	Parameter
CLK_MASK	clocks393m	Parameter
CLK_STATUS_REG_ADDR	clocks393m	Parameter
CLK_CNTRL	clocks393m	Parameter
CLK_STATUS	clocks393m	Parameter
CLK_RESET	clocks393m	Parameter
CLK_PWDWN	clocks393m	Parameter
CLKIN_PERIOD_PCLK	clocks393m	Parameter
DIVCLK_DIVIDE_PCLK	clocks393m	Parameter
CLKFBOUT_MULT_PCLK	clocks393m	Parameter
CLKOUT_DIV_PCLK	clocks393m	Parameter
BUF_CLK1X_PCLK	clocks393m	Parameter
MULTICLK_IN_PERIOD	clocks393m	Parameter
MULTICLK_DIVCLK	clocks393m	Parameter
MULTICLK_MULT	clocks393m	Parameter
MULTICLK_DIV_DLYREF	clocks393m	Parameter
MULTICLK_DIV_AXIHP	clocks393m	Parameter
MULTICLK_DIV_XCLK	clocks393m	Parameter
MULTICLK_DIV_SYNC	clocks393m	Parameter
MULTICLK_PHASE_FB	clocks393m	Parameter
MULTICLK_PHASE_DLYREF	clocks393m	Parameter
MULTICLK_BUF_DLYREF	clocks393m	Parameter
MULTICLK_PHASE_AXIHP	clocks393m	Parameter
MULTICLK_BUF_AXIHP	clocks393m	Parameter
MULTICLK_PHASE_XCLK	clocks393m	Parameter
MULTICLK_BUF_XCLK	clocks393m	Parameter
MULTICLK_PHASE_SYNC	clocks393m	Parameter
MULTICLK_BUF_SYNC	clocks393m	Parameter
MEMCLK_CAPACITANCE	clocks393m	Parameter
MEMCLK_IBUF_LOW_PWR	clocks393m	Parameter
MEMCLK_IOSTANDARD	clocks393m	Parameter
FFCLK0_CAPACITANCE	clocks393m	Parameter
FFCLK0_DIFF_TERM	clocks393m	Parameter
FFCLK0_IBUF_LOW_PWR	clocks393m	Parameter
FFCLK0_IOSTANDARD	clocks393m	Parameter
FFCLK1_CAPACITANCE	clocks393m	Parameter
FFCLK1_DIFF_TERM	clocks393m	Parameter
FFCLK1_IBUF_LOW_PWR	clocks393m	Parameter
FFCLK1_IOSTANDARD	clocks393m	Parameter
async_rst	clocks393m	Input
mclk	clocks393m	Input
mrst	clocks393m	Input
cmd_ad	clocks393m	Input
cmd_stb	clocks393m	Input
status_ad	clocks393m	Output
status_rq	clocks393m	Output
status_start	clocks393m	Input
fclk	clocks393m	Input
memclk_pad	clocks393m	Input
ffclk0p_pad	clocks393m	Input
ffclk0n_pad	clocks393m	Input
ffclk1p_pad	clocks393m	Input
ffclk1n_pad	clocks393m	Input
aclk	clocks393m	Output
hclk	clocks393m	Output
pclk	clocks393m	Output
xclk	clocks393m	Output
sync_clk	clocks393m	Output
time_ref	clocks393m	Output
dly_ref_clk	clocks393m	Output
extra_status	clocks393m	Input
locked_sync_clk	clocks393m	Output
locked_xclk	clocks393m	Output
locked_pclk	clocks393m	Output
locked_hclk	clocks393m	Output
memclk	clocks393m	Signal
ffclk0	clocks393m	Signal
ffclk1	clocks393m	Signal
status_data	clocks393m	Signal
write_in_progress	axibram_write	Signal
cmd_data	clocks393m	Signal
cmd_we	clocks393m	Signal
cmd_a	clocks393m	Signal
set_ctrl_w	clocks393m	Signal
set_status_w	clocks393m	Signal
locked	clocks393m	Signal
reset_clk	clocks393m	Signal
pwrdwn_clk	clocks393m	Signal
test_clk	clocks393m	Signal
memclk_rst	clocks393m	Signal
ffclk0_rst	clocks393m	Signal
ffclk1_rst	clocks393m	Signal
multi_clkfb	clocks393m	Signal
hclk_pre	clocks393m	Signal
dly_ref_clk_pre	clocks393m	Signal
xclk_pre	clocks393m	Signal
sync_clk_pre	clocks393m	Signal
time_ref_r	clocks393m	Signal
cmd_frame_sequencer.ADDR	cmd_deser	Parameter
cmd_seq_mux.ADDR	cmd_deser	Parameter
mcntrl393.mcntrl_tiled_rw.ADDR	cmd_deser	Parameter
mcntrl393.mcntrl_ps_pio.ADDR	cmd_deser	Parameter
mcntrl393.memctrl16.cmd_deser.ADDR	cmd_deser	Parameter
mcntrl393.memctrl16.mcontr_sequencer.ADDR	cmd_deser	Parameter
membridge.ADDR	cmd_deser	Parameter
sensors393.ADDR	cmd_deser	Parameter
compressor393.ADDR	cmd_deser	Parameter
gpio393.ADDR	cmd_deser	Parameter
timing393.ADDR	cmd_deser	Parameter
event_logger.ADDR	cmd_deser	Parameter
mult_saxi_wr.ADDR	cmd_deser	Parameter
clocks393m.ADDR	cmd_deser	Parameter
debug_master.ADDR	cmd_deser	Parameter
cmd_frame_sequencer.ADDR_MASK	cmd_deser	Parameter
cmd_seq_mux.ADDR_MASK	cmd_deser	Parameter
mcntrl393.mcntrl_tiled_rw.ADDR_MASK	cmd_deser	Parameter
mcntrl393.mcntrl_ps_pio.ADDR_MASK	cmd_deser	Parameter
mcntrl393.memctrl16.cmd_deser.ADDR_MASK	cmd_deser	Parameter
mcntrl393.memctrl16.mcontr_sequencer.ADDR_MASK	cmd_deser	Parameter
membridge.ADDR_MASK	cmd_deser	Parameter
sensors393.ADDR_MASK	cmd_deser	Parameter
compressor393.ADDR_MASK	cmd_deser	Parameter
gpio393.ADDR_MASK	cmd_deser	Parameter
timing393.ADDR_MASK	cmd_deser	Parameter
event_logger.ADDR_MASK	cmd_deser	Parameter
mult_saxi_wr.ADDR_MASK	cmd_deser	Parameter
clocks393m.ADDR_MASK	cmd_deser	Parameter
debug_master.ADDR_MASK	cmd_deser	Parameter
cmd_frame_sequencer.NUM_CYCLES	cmd_deser	Parameter
cmd_seq_mux.NUM_CYCLES	cmd_deser	Parameter
mcntrl393.mcntrl_tiled_rw.NUM_CYCLES	cmd_deser	Parameter
mcntrl393.mcntrl_ps_pio.NUM_CYCLES	cmd_deser	Parameter
mcntrl393.memctrl16.cmd_deser.NUM_CYCLES	cmd_deser	Parameter
mcntrl393.memctrl16.mcontr_sequencer.NUM_CYCLES	cmd_deser	Parameter
membridge.NUM_CYCLES	cmd_deser	Parameter
sensors393.NUM_CYCLES	cmd_deser	Parameter
compressor393.NUM_CYCLES	cmd_deser	Parameter
gpio393.NUM_CYCLES	cmd_deser	Parameter
timing393.NUM_CYCLES	cmd_deser	Parameter
event_logger.NUM_CYCLES	cmd_deser	Parameter
mult_saxi_wr.NUM_CYCLES	cmd_deser	Parameter
clocks393m.NUM_CYCLES	cmd_deser	Parameter
debug_master.NUM_CYCLES	cmd_deser	Parameter
cmd_frame_sequencer.ADDR_WIDTH	cmd_deser	Parameter
cmd_seq_mux.ADDR_WIDTH	cmd_deser	Parameter
mcntrl393.mcntrl_tiled_rw.ADDR_WIDTH	cmd_deser	Parameter
mcntrl393.mcntrl_ps_pio.ADDR_WIDTH	cmd_deser	Parameter
mcntrl393.memctrl16.cmd_deser.ADDR_WIDTH	cmd_deser	Parameter
mcntrl393.memctrl16.mcontr_sequencer.ADDR_WIDTH	cmd_deser	Parameter
membridge.ADDR_WIDTH	cmd_deser	Parameter
sensors393.ADDR_WIDTH	cmd_deser	Parameter
compressor393.ADDR_WIDTH	cmd_deser	Parameter
gpio393.ADDR_WIDTH	cmd_deser	Parameter
timing393.ADDR_WIDTH	cmd_deser	Parameter
event_logger.ADDR_WIDTH	cmd_deser	Parameter
mult_saxi_wr.ADDR_WIDTH	cmd_deser	Parameter
clocks393m.ADDR_WIDTH	cmd_deser	Parameter
debug_master.ADDR_WIDTH	cmd_deser	Parameter
cmd_frame_sequencer.DATA_WIDTH	cmd_deser	Parameter
cmd_seq_mux.DATA_WIDTH	cmd_deser	Parameter
mcntrl393.mcntrl_tiled_rw.DATA_WIDTH	cmd_deser	Parameter
mcntrl393.mcntrl_ps_pio.DATA_WIDTH	cmd_deser	Parameter
mcntrl393.memctrl16.cmd_deser.DATA_WIDTH	cmd_deser	Parameter
mcntrl393.memctrl16.mcontr_sequencer.DATA_WIDTH	cmd_deser	Parameter
membridge.DATA_WIDTH	cmd_deser	Parameter
sensors393.DATA_WIDTH	cmd_deser	Parameter
compressor393.DATA_WIDTH	cmd_deser	Parameter
gpio393.DATA_WIDTH	cmd_deser	Parameter
timing393.DATA_WIDTH	cmd_deser	Parameter
event_logger.DATA_WIDTH	cmd_deser	Parameter
mult_saxi_wr.DATA_WIDTH	cmd_deser	Parameter
clocks393m.DATA_WIDTH	cmd_deser	Parameter
debug_master.DATA_WIDTH	cmd_deser	Parameter
cmd_frame_sequencer.ADDR1	cmd_deser	Parameter
cmd_seq_mux.ADDR1	cmd_deser	Parameter
mcntrl393.mcntrl_tiled_rw.ADDR1	cmd_deser	Parameter
mcntrl393.mcntrl_ps_pio.ADDR1	cmd_deser	Parameter
mcntrl393.memctrl16.cmd_deser.ADDR1	cmd_deser	Parameter
mcntrl393.memctrl16.mcontr_sequencer.ADDR1	cmd_deser	Parameter
membridge.ADDR1	cmd_deser	Parameter
sensors393.ADDR1	cmd_deser	Parameter
compressor393.ADDR1	cmd_deser	Parameter
gpio393.ADDR1	cmd_deser	Parameter
timing393.ADDR1	cmd_deser	Parameter
event_logger.ADDR1	cmd_deser	Parameter
mult_saxi_wr.ADDR1	cmd_deser	Parameter
clocks393m.ADDR1	cmd_deser	Parameter
debug_master.ADDR1	cmd_deser	Parameter
cmd_frame_sequencer.ADDR_MASK1	cmd_deser	Parameter
cmd_seq_mux.ADDR_MASK1	cmd_deser	Parameter
mcntrl393.mcntrl_tiled_rw.ADDR_MASK1	cmd_deser	Parameter
mcntrl393.mcntrl_ps_pio.ADDR_MASK1	cmd_deser	Parameter
mcntrl393.memctrl16.cmd_deser.ADDR_MASK1	cmd_deser	Parameter
mcntrl393.memctrl16.mcontr_sequencer.ADDR_MASK1	cmd_deser	Parameter
membridge.ADDR_MASK1	cmd_deser	Parameter
sensors393.ADDR_MASK1	cmd_deser	Parameter
compressor393.ADDR_MASK1	cmd_deser	Parameter
gpio393.ADDR_MASK1	cmd_deser	Parameter
timing393.ADDR_MASK1	cmd_deser	Parameter
event_logger.ADDR_MASK1	cmd_deser	Parameter
mult_saxi_wr.ADDR_MASK1	cmd_deser	Parameter
clocks393m.ADDR_MASK1	cmd_deser	Parameter
debug_master.ADDR_MASK1	cmd_deser	Parameter
cmd_frame_sequencer.ADDR2	cmd_deser	Parameter
cmd_seq_mux.ADDR2	cmd_deser	Parameter
mcntrl393.mcntrl_tiled_rw.ADDR2	cmd_deser	Parameter
mcntrl393.mcntrl_ps_pio.ADDR2	cmd_deser	Parameter
mcntrl393.memctrl16.cmd_deser.ADDR2	cmd_deser	Parameter
mcntrl393.memctrl16.mcontr_sequencer.ADDR2	cmd_deser	Parameter
membridge.ADDR2	cmd_deser	Parameter
sensors393.ADDR2	cmd_deser	Parameter
compressor393.ADDR2	cmd_deser	Parameter
gpio393.ADDR2	cmd_deser	Parameter
timing393.ADDR2	cmd_deser	Parameter
event_logger.ADDR2	cmd_deser	Parameter
mult_saxi_wr.ADDR2	cmd_deser	Parameter
clocks393m.ADDR2	cmd_deser	Parameter
debug_master.ADDR2	cmd_deser	Parameter
cmd_frame_sequencer.ADDR_MASK2	cmd_deser	Parameter
cmd_seq_mux.ADDR_MASK2	cmd_deser	Parameter
mcntrl393.mcntrl_tiled_rw.ADDR_MASK2	cmd_deser	Parameter
mcntrl393.mcntrl_ps_pio.ADDR_MASK2	cmd_deser	Parameter
mcntrl393.memctrl16.cmd_deser.ADDR_MASK2	cmd_deser	Parameter
mcntrl393.memctrl16.mcontr_sequencer.ADDR_MASK2	cmd_deser	Parameter
membridge.ADDR_MASK2	cmd_deser	Parameter
sensors393.ADDR_MASK2	cmd_deser	Parameter
compressor393.ADDR_MASK2	cmd_deser	Parameter
gpio393.ADDR_MASK2	cmd_deser	Parameter
timing393.ADDR_MASK2	cmd_deser	Parameter
event_logger.ADDR_MASK2	cmd_deser	Parameter
mult_saxi_wr.ADDR_MASK2	cmd_deser	Parameter
clocks393m.ADDR_MASK2	cmd_deser	Parameter
debug_master.ADDR_MASK2	cmd_deser	Parameter
cmd_frame_sequencer.WE_EARLY	cmd_deser	Parameter
cmd_seq_mux.WE_EARLY	cmd_deser	Parameter
mcntrl393.mcntrl_tiled_rw.WE_EARLY	cmd_deser	Parameter
mcntrl393.mcntrl_ps_pio.WE_EARLY	cmd_deser	Parameter
mcntrl393.memctrl16.cmd_deser.WE_EARLY	cmd_deser	Parameter
mcntrl393.memctrl16.mcontr_sequencer.WE_EARLY	cmd_deser	Parameter
membridge.WE_EARLY	cmd_deser	Parameter
sensors393.WE_EARLY	cmd_deser	Parameter
compressor393.WE_EARLY	cmd_deser	Parameter
gpio393.WE_EARLY	cmd_deser	Parameter
timing393.WE_EARLY	cmd_deser	Parameter
event_logger.WE_EARLY	cmd_deser	Parameter
mult_saxi_wr.WE_EARLY	cmd_deser	Parameter
clocks393m.WE_EARLY	cmd_deser	Parameter
debug_master.WE_EARLY	cmd_deser	Parameter
cmd_frame_sequencer.rst	cmd_deser	Input
cmd_seq_mux.rst	cmd_deser	Input
mcntrl393.mcntrl_tiled_rw.rst	cmd_deser	Input
mcntrl393.mcntrl_ps_pio.rst	cmd_deser	Input
mcntrl393.memctrl16.cmd_deser.rst	cmd_deser	Input
mcntrl393.memctrl16.mcontr_sequencer.rst	cmd_deser	Input
membridge.rst	cmd_deser	Input
sensors393.rst	cmd_deser	Input
compressor393.rst	cmd_deser	Input
gpio393.rst	cmd_deser	Input
timing393.rst	cmd_deser	Input
event_logger.rst	cmd_deser	Input
mult_saxi_wr.rst	cmd_deser	Input
clocks393m.rst	cmd_deser	Input
debug_master.rst	cmd_deser	Input
cmd_frame_sequencer.clk	cmd_deser	Input
cmd_seq_mux.clk	cmd_deser	Input
mcntrl393.mcntrl_tiled_rw.clk	cmd_deser	Input
mcntrl393.mcntrl_ps_pio.clk	cmd_deser	Input
mcntrl393.memctrl16.cmd_deser.clk	cmd_deser	Input
mcntrl393.memctrl16.mcontr_sequencer.clk	cmd_deser	Input
membridge.clk	cmd_deser	Input
sensors393.clk	cmd_deser	Input
compressor393.clk	cmd_deser	Input
gpio393.clk	cmd_deser	Input
timing393.clk	cmd_deser	Input
event_logger.clk	cmd_deser	Input
mult_saxi_wr.clk	cmd_deser	Input
clocks393m.clk	cmd_deser	Input
debug_master.clk	cmd_deser	Input
cmd_frame_sequencer.srst	cmd_deser	Input
cmd_seq_mux.srst	cmd_deser	Input
mcntrl393.mcntrl_tiled_rw.srst	cmd_deser	Input
mcntrl393.mcntrl_ps_pio.srst	cmd_deser	Input
mcntrl393.memctrl16.cmd_deser.srst	cmd_deser	Input
mcntrl393.memctrl16.mcontr_sequencer.srst	cmd_deser	Input
membridge.srst	cmd_deser	Input
sensors393.srst	cmd_deser	Input
compressor393.srst	cmd_deser	Input
gpio393.srst	cmd_deser	Input
timing393.srst	cmd_deser	Input
event_logger.srst	cmd_deser	Input
mult_saxi_wr.srst	cmd_deser	Input
clocks393m.srst	cmd_deser	Input
debug_master.srst	cmd_deser	Input
cmd_frame_sequencer.ad	cmd_deser	Input
cmd_seq_mux.ad	cmd_deser	Input
mcntrl393.mcntrl_tiled_rw.ad	cmd_deser	Input
mcntrl393.mcntrl_ps_pio.ad	cmd_deser	Input
mcntrl393.memctrl16.cmd_deser.ad	cmd_deser	Input
mcntrl393.memctrl16.mcontr_sequencer.ad	cmd_deser	Input
membridge.ad	cmd_deser	Input
sensors393.ad	cmd_deser	Input
compressor393.ad	cmd_deser	Input
gpio393.ad	cmd_deser	Input
timing393.ad	cmd_deser	Input
event_logger.ad	cmd_deser	Input
mult_saxi_wr.ad	cmd_deser	Input
clocks393m.ad	cmd_deser	Input
debug_master.ad	cmd_deser	Input
cmd_frame_sequencer.stb	cmd_deser	Input
cmd_seq_mux.stb	cmd_deser	Input
mcntrl393.mcntrl_tiled_rw.stb	cmd_deser	Input
mcntrl393.mcntrl_ps_pio.stb	cmd_deser	Input
mcntrl393.memctrl16.cmd_deser.stb	cmd_deser	Input
mcntrl393.memctrl16.mcontr_sequencer.stb	cmd_deser	Input
membridge.stb	cmd_deser	Input
sensors393.stb	cmd_deser	Input
compressor393.stb	cmd_deser	Input
gpio393.stb	cmd_deser	Input
timing393.stb	cmd_deser	Input
event_logger.stb	cmd_deser	Input
mult_saxi_wr.stb	cmd_deser	Input
clocks393m.stb	cmd_deser	Input
debug_master.stb	cmd_deser	Input
cmd_frame_sequencer.addr	cmd_deser	Output
cmd_seq_mux.addr	cmd_deser	Output
mcntrl393.mcntrl_tiled_rw.addr	cmd_deser	Output
mcntrl393.mcntrl_ps_pio.addr	cmd_deser	Output
mcntrl393.memctrl16.cmd_deser.addr	cmd_deser	Output
mcntrl393.memctrl16.mcontr_sequencer.addr	cmd_deser	Output
membridge.addr	cmd_deser	Output
sensors393.addr	cmd_deser	Output
compressor393.addr	cmd_deser	Output
gpio393.addr	cmd_deser	Output
timing393.addr	cmd_deser	Output
event_logger.addr	cmd_deser	Output
mult_saxi_wr.addr	cmd_deser	Output
clocks393m.addr	cmd_deser	Output
debug_master.addr	cmd_deser	Output
cmd_frame_sequencer.data	cmd_deser	Output
cmd_seq_mux.data	cmd_deser	Output
mcntrl393.mcntrl_tiled_rw.data	cmd_deser	Output
mcntrl393.mcntrl_ps_pio.data	cmd_deser	Output
mcntrl393.memctrl16.cmd_deser.data	cmd_deser	Output
mcntrl393.memctrl16.mcontr_sequencer.data	cmd_deser	Output
membridge.data	cmd_deser	Output
sensors393.data	cmd_deser	Output
compressor393.data	cmd_deser	Output
gpio393.data	cmd_deser	Output
timing393.data	cmd_deser	Output
event_logger.data	cmd_deser	Output
mult_saxi_wr.data	cmd_deser	Output
clocks393m.data	cmd_deser	Output
debug_master.data	cmd_deser	Output
cmd_frame_sequencer.we	cmd_deser	Output
cmd_seq_mux.we	cmd_deser	Output
mcntrl393.mcntrl_tiled_rw.we	cmd_deser	Output
mcntrl393.mcntrl_ps_pio.we	cmd_deser	Output
mcntrl393.memctrl16.cmd_deser.we	cmd_deser	Output
mcntrl393.memctrl16.mcontr_sequencer.we	cmd_deser	Output
membridge.we	cmd_deser	Output
sensors393.we	cmd_deser	Output
compressor393.we	cmd_deser	Output
gpio393.we	cmd_deser	Output
timing393.we	cmd_deser	Output
event_logger.we	cmd_deser	Output
mult_saxi_wr.we	cmd_deser	Output
clocks393m.we	cmd_deser	Output
debug_master.we	cmd_deser	Output
cmd_frame_sequencer.WE_WIDTH	cmd_deser	Parameter
cmd_seq_mux.WE_WIDTH	cmd_deser	Parameter
mcntrl393.mcntrl_tiled_rw.WE_WIDTH	cmd_deser	Parameter
mcntrl393.mcntrl_ps_pio.WE_WIDTH	cmd_deser	Parameter
mcntrl393.memctrl16.cmd_deser.WE_WIDTH	cmd_deser	Parameter
mcntrl393.memctrl16.mcontr_sequencer.WE_WIDTH	cmd_deser	Parameter
membridge.WE_WIDTH	cmd_deser	Parameter
sensors393.WE_WIDTH	cmd_deser	Parameter
compressor393.WE_WIDTH	cmd_deser	Parameter
gpio393.WE_WIDTH	cmd_deser	Parameter
timing393.WE_WIDTH	cmd_deser	Parameter
event_logger.WE_WIDTH	cmd_deser	Parameter
mult_saxi_wr.WE_WIDTH	cmd_deser	Parameter
clocks393m.WE_WIDTH	cmd_deser	Parameter
debug_master.WE_WIDTH	cmd_deser	Parameter
write_address	axibram_write	Signal
arburst	axibram_read	Input
ahci_sata_layers	sata_ahci_top	Module Instance
ahci_top	sata_ahci_top	Module Instance
ALWAYS_0 aclk	axibram_read	Always Construct
ALWAYS_1 aclk	axibram_read	Always Construct
ALWAYS_17 mclk	membridge	Always Construct
ALWAYS_18 mclk	membridge	Always Construct
ALWAYS_19 hclk	membridge	Always Construct
ALWAYS_2 aclk	axibram_write	Always Construct
ALWAYS_20 hclk	membridge	Always Construct
ALWAYS_205 xclk	event_logger	Always Construct
ALWAYS_206 mclk	event_logger	Always Construct
ALWAYS_207 xclk	event_logger	Always Construct
ALWAYS_208 xclk	event_logger	Always Construct
ALWAYS_209 xclk	event_logger	Always Construct
ALWAYS_21 mclk	membridge	Always Construct
ALWAYS_22 hclk	membridge	Always Construct
ALWAYS_23 hclk	membridge	Always Construct
ALWAYS_24 hclk	membridge	Always Construct
ALWAYS_25 hclk	membridge	Always Construct
ALWAYS_26 hclk	membridge	Always Construct
ALWAYS_27 hclk	membridge	Always Construct
ALWAYS_272 mclk	mcntrl393	Always Construct
ALWAYS_273 axi_clk	mcntrl393	Always Construct
ALWAYS_274 axi_clk	mcntrl393	Always Construct
ALWAYS_275 mclk	mcntrl393_test01	Always Construct
ALWAYS_276 mclk	mcntrl393_test01	Always Construct
ALWAYS_277 mclk	mcntrl393_test01	Always Construct
ALWAYS_28 hclk	membridge	Always Construct
ALWAYS_280 wclk	mcntrl_buf_rd	Always Construct
ALWAYS_281 rclk	mcntrl_buf_wr	Always Construct
ALWAYS_29 hclk	membridge	Always Construct
ALWAYS_3 aclk	axibram_write	Always Construct
ALWAYS_32 mclk	mult_saxi_wr	Always Construct
ALWAYS_33 mclk	mult_saxi_wr	Always Construct
ALWAYS_34 aclk	mult_saxi_wr	Always Construct
ALWAYS_35 aclk	mult_saxi_wr	Always Construct
ALWAYS_36 aclk	mult_saxi_wr	Always Construct
ALWAYS_37 mclk	mult_saxi_wr	Always Construct
ALWAYS_38 iclk	mult_saxi_wr_inbuf	Always Construct
ALWAYS_39 mclk	mult_saxi_wr_inbuf	Always Construct
ALWAYS_397 mclk	sensors393	Always Construct
ALWAYS_471 mclk	clocks393m	Always Construct
ALWAYS_472 memclk or memclk_rst	clocks393m	Always Construct
ALWAYS_473 ffclk0 or ffclk0_rst	clocks393m	Always Construct
ALWAYS_474 ffclk1 or ffclk1_rst	clocks393m	Always Construct
ALWAYS_475 mclk	clocks393m	Always Construct
ALWAYS_479 mclk	cmd_frame_sequencer	Always Construct
ALWAYS_480 mclk	cmd_frame_sequencer	Always Construct
ALWAYS_481 mclk	cmd_frame_sequencer	Always Construct
ALWAYS_482 axi_clk	cmd_mux	Always Construct
ALWAYS_483 **	cmd_mux	Always Construct
ALWAYS_484 mclk	cmd_mux	Always Construct
ALWAYS_485 mclk	cmd_mux	Always Construct
ALWAYS_486 mclk	cmd_mux	Always Construct
ALWAYS_487 mclk	cmd_mux	Always Construct
ALWAYS_488 mclk	cmd_mux	Always Construct
ALWAYS_489 axi_clk	cmd_readback	Always Construct
ALWAYS_490 axi_clk	cmd_readback	Always Construct
ALWAYS_491 mclk	cmd_readback	Always Construct
ALWAYS_492 mclk	cmd_readback	Always Construct
ALWAYS_493 mclk	cmd_readback	Always Construct
ALWAYS_494 mclk	cmd_seq_mux	Always Construct
ALWAYS_495 mclk	cmd_seq_mux	Always Construct
ALWAYS_496 mclk	debug_master	Always Construct
sensors393.ALWAYS_497 mclk	debug_slave	Always Construct
compressor393.ALWAYS_497 mclk	debug_slave	Always Construct
mcntrl393.ALWAYS_508 clk or rst	fifo_same_clock	Always Construct
sensors393.ALWAYS_508 clk or rst	fifo_same_clock	Always Construct
mult_saxi_wr.ALWAYS_508 clk or rst	fifo_same_clock	Always Construct
axibram_write.ALWAYS_508 clk or rst	fifo_same_clock	Always Construct
axibram_read.ALWAYS_508 clk or rst	fifo_same_clock	Always Construct
mcntrl393.ALWAYS_509 clk	fifo_same_clock	Always Construct
sensors393.ALWAYS_509 clk	fifo_same_clock	Always Construct
mult_saxi_wr.ALWAYS_509 clk	fifo_same_clock	Always Construct
axibram_write.ALWAYS_509 clk	fifo_same_clock	Always Construct
axibram_read.ALWAYS_509 clk	fifo_same_clock	Always Construct
ALWAYS_513 mclk	frame_num_sync	Always Construct
ALWAYS_514 mclk	gpio393	Always Construct
sensors393.ALWAYS_532 src_clk or rst	pulse_cross_clock	Always Construct
sensors393.histogram_saxi.ALWAYS_532 src_clk or rst	pulse_cross_clock	Always Construct
compressor393.ALWAYS_532 src_clk or rst	pulse_cross_clock	Always Construct
timing393.ALWAYS_532 src_clk or rst	pulse_cross_clock	Always Construct
event_logger.pulse_cross_clock.ALWAYS_532 src_clk or rst	pulse_cross_clock	Always Construct
event_logger.imu_exttime393.ALWAYS_532 src_clk or rst	pulse_cross_clock	Always Construct
mult_saxi_wr_inbuf.ALWAYS_532 src_clk or rst	pulse_cross_clock	Always Construct
mult_saxi_wr.mult_saxi_wr_pointers.ALWAYS_532 src_clk or rst	pulse_cross_clock	Always Construct
mult_saxi_wr.pulse_cross_clock.ALWAYS_532 src_clk or rst	pulse_cross_clock	Always Construct
sata_ahci_top.ahci_sata_layers.ALWAYS_532 src_clk or rst	pulse_cross_clock	Always Construct
sata_ahci_top.ahci_sata_layers.freq_meter.ALWAYS_532 src_clk or rst	pulse_cross_clock	Always Construct
sensors393.ALWAYS_533 dst_clk	pulse_cross_clock	Always Construct
sensors393.histogram_saxi.ALWAYS_533 dst_clk	pulse_cross_clock	Always Construct
compressor393.ALWAYS_533 dst_clk	pulse_cross_clock	Always Construct
timing393.ALWAYS_533 dst_clk	pulse_cross_clock	Always Construct
event_logger.pulse_cross_clock.ALWAYS_533 dst_clk	pulse_cross_clock	Always Construct
event_logger.imu_exttime393.ALWAYS_533 dst_clk	pulse_cross_clock	Always Construct
mult_saxi_wr_inbuf.ALWAYS_533 dst_clk	pulse_cross_clock	Always Construct
mult_saxi_wr.mult_saxi_wr_pointers.ALWAYS_533 dst_clk	pulse_cross_clock	Always Construct
mult_saxi_wr.pulse_cross_clock.ALWAYS_533 dst_clk	pulse_cross_clock	Always Construct
sata_ahci_top.ahci_sata_layers.ALWAYS_533 dst_clk	pulse_cross_clock	Always Construct
sata_ahci_top.ahci_sata_layers.freq_meter.ALWAYS_533 dst_clk	pulse_cross_clock	Always Construct
ALWAYS_542 axi_clk	status_read	Always Construct
ALWAYS_543 axi_clk	status_read	Always Construct
ALWAYS_544 clk	status_read	Always Construct
ALWAYS_545 clk	status_read	Always Construct
status_router16.ALWAYS_546 rst or clk	status_router2	Always Construct
status_router16.status_router8.status_router2.ALWAYS_546 rst or clk	status_router2	Always Construct
status_router16.status_router8.status_router4.ALWAYS_546 rst or clk	status_router2	Always Construct
mcntrl393.ALWAYS_546 rst or clk	status_router2	Always Construct
sensors393.ALWAYS_546 rst or clk	status_router2	Always Construct
ALWAYS_547 arst or clk[0]	sync_resets	Always Construct
ALWAYS_548 clk[0]	sync_resets	Always Construct
ALWAYS_555 mclk	x393	Always Construct
ALWAYS_556 axird_bram_rclk	x393	Always Construct
ALWAYS_557 comb_rst or axi_aclk	x393	Always Construct
ALWAYS_605 hclk or arst	sata_ahci_top	Always Construct
axibram_read	x393
axibram_write	x393
buf_xclk_mclk16_393	event_logger	Module Instance
BUFG	clocks393m	Module Instance
clocks393m.BUFH	dual_clock_source	Module Instance
clocks393m.select_clk_buf.BUFH	select_clk_buf	Module Instance
clocks393m.BUFIO	dual_clock_source	Module Instance
clocks393m.select_clk_buf.BUFIO	select_clk_buf	Module Instance
clocks393m.BUFMR	dual_clock_source	Module Instance
clocks393m.select_clk_buf.BUFMR	select_clk_buf	Module Instance
clocks393m.BUFR	dual_clock_source	Module Instance
clocks393m.select_clk_buf.BUFR	select_clk_buf	Module Instance
camsync393	timing393	Module Instance
clocks393m	x393
mcntrl393_test01.cmd_deser	mcntrl393_test01	Module Instance
cmd_frame_sequencer.cmd_deser	cmd_frame_sequencer	Module Instance
cmd_seq_mux.cmd_deser	cmd_seq_mux	Module Instance
mcntrl393.mcntrl_linear_rw.cmd_deser	mcntrl_linear_rw	Module Instance
mcntrl393.mcntrl_tiled_rw.cmd_deser	mcntrl_tiled_rw	Module Instance
mcntrl393.mcntrl_ps_pio.cmd_deser	mcntrl_ps_pio	Module Instance
mcntrl393.memctrl16.cmd_deser	memctrl16	Module Instance
membridge.cmd_deser	membridge	Module Instance
sensors393.sensor_channel.cmd_deser	sensor_channel	Module Instance
sensors393.histogram_saxi.cmd_deser	histogram_saxi	Module Instance
compressor393.jp_channel.cmd_deser	jp_channel	Module Instance
compressor393.cmprs_afi_mux.cmd_deser	cmprs_afi_mux	Module Instance
gpio393.cmd_deser	gpio393	Module Instance
timing393.rtc393.cmd_deser	rtc393	Module Instance
timing393.camsync393.cmd_deser	camsync393	Module Instance
event_logger.cmd_deser	event_logger	Module Instance
mult_saxi_wr.cmd_deser	mult_saxi_wr	Module Instance
clocks393m.cmd_deser	clocks393m	Module Instance
debug_master.cmd_deser	debug_master	Module Instance
cmd_frame_sequencer.cmd_deser_dual	cmd_deser	Module Instance
cmd_seq_mux.cmd_deser_dual	cmd_deser	Module Instance
mcntrl393.mcntrl_tiled_rw.cmd_deser_dual	cmd_deser	Module Instance
mcntrl393.mcntrl_ps_pio.cmd_deser_dual	cmd_deser	Module Instance
mcntrl393.memctrl16.cmd_deser.cmd_deser_dual	cmd_deser	Module Instance
mcntrl393.memctrl16.mcontr_sequencer.cmd_deser_dual	cmd_deser	Module Instance
membridge.cmd_deser_dual	cmd_deser	Module Instance
sensors393.cmd_deser_dual	cmd_deser	Module Instance
compressor393.cmd_deser_dual	cmd_deser	Module Instance
gpio393.cmd_deser_dual	cmd_deser	Module Instance
timing393.cmd_deser_dual	cmd_deser	Module Instance
event_logger.cmd_deser_dual	cmd_deser	Module Instance
mult_saxi_wr.cmd_deser_dual	cmd_deser	Module Instance
clocks393m.cmd_deser_dual	cmd_deser	Module Instance
debug_master.cmd_deser_dual	cmd_deser	Module Instance
cmd_frame_sequencer.cmd_deser_multi	cmd_deser	Module Instance
cmd_seq_mux.cmd_deser_multi	cmd_deser	Module Instance
mcntrl393.mcntrl_tiled_rw.cmd_deser_multi	cmd_deser	Module Instance
mcntrl393.mcntrl_ps_pio.cmd_deser_multi	cmd_deser	Module Instance
mcntrl393.memctrl16.cmd_deser.cmd_deser_multi	cmd_deser	Module Instance
mcntrl393.memctrl16.mcontr_sequencer.cmd_deser_multi	cmd_deser	Module Instance
membridge.cmd_deser_multi	cmd_deser	Module Instance
sensors393.cmd_deser_multi	cmd_deser	Module Instance
compressor393.cmd_deser_multi	cmd_deser	Module Instance
gpio393.cmd_deser_multi	cmd_deser	Module Instance
timing393.cmd_deser_multi	cmd_deser	Module Instance
event_logger.cmd_deser_multi	cmd_deser	Module Instance
mult_saxi_wr.cmd_deser_multi	cmd_deser	Module Instance
clocks393m.cmd_deser_multi	cmd_deser	Module Instance
debug_master.cmd_deser_multi	cmd_deser	Module Instance
cmd_frame_sequencer.cmd_deser_single	cmd_deser	Module Instance
cmd_seq_mux.cmd_deser_single	cmd_deser	Module Instance
mcntrl393.mcntrl_tiled_rw.cmd_deser_single	cmd_deser	Module Instance
mcntrl393.mcntrl_ps_pio.cmd_deser_single	cmd_deser	Module Instance
mcntrl393.memctrl16.cmd_deser.cmd_deser_single	cmd_deser	Module Instance
mcntrl393.memctrl16.mcontr_sequencer.cmd_deser_single	cmd_deser	Module Instance
membridge.cmd_deser_single	cmd_deser	Module Instance
sensors393.cmd_deser_single	cmd_deser	Module Instance
compressor393.cmd_deser_single	cmd_deser	Module Instance
gpio393.cmd_deser_single	cmd_deser	Module Instance
timing393.cmd_deser_single	cmd_deser	Module Instance
event_logger.cmd_deser_single	cmd_deser	Module Instance
mult_saxi_wr.cmd_deser_single	cmd_deser	Module Instance
clocks393m.cmd_deser_single	cmd_deser	Module Instance
debug_master.cmd_deser_single	cmd_deser	Module Instance
cmd_encod_4mux	mcntrl393	Module Instance
cmd_encod_linear_mux	mcntrl393	Module Instance
cmd_encod_linear_rw	mcntrl393	Module Instance
cmd_encod_tiled_32_rw	mcntrl393	Module Instance
cmd_encod_tiled_mux	mcntrl393	Module Instance
cmd_encod_tiled_rw	mcntrl393	Module Instance
cmd_frame_sequencer	x393
cmd_mux	x393
cmd_readback	x393
cmd_seq_mux	x393
cmprs_afi_mux	compressor393	Module Instance
cmprs_afi_mux	compressor393	Module Instance
compressor393	x393
debug_master	x393
membridge.debug_slave	membridge	Module Instance
sensors393.sensor_channel.debug_slave	sensor_channel	Module Instance
sensors393.histogram_saxi.debug_slave	histogram_saxi	Module Instance
compressor393.jp_channel.debug_slave	jp_channel	Module Instance
compressor393.cmprs_afi_mux.debug_slave	cmprs_afi_mux	Module Instance
compressor393.dly01_16	dly_16	Module Instance
debug_master.dly01_16	dly_16	Module Instance
compressor393.dly_16	jp_channel	Module Instance
compressor393.cmprs_afi_mux.dly_16	cmprs_afi_mux	Module Instance
debug_master.dly_16	debug_master	Module Instance
dual_clock_source	clocks393m	Module Instance
elastic_cross_clock	membridge	Module Instance
event_logger	x393
status_router16.fifo_1cycle	status_router2	Module Instance
mcntrl393.fifo_1cycle	status_router2	Module Instance
sensors393.fifo_1cycle	status_router2	Module Instance
fifo_cross_clocks	cmd_mux	Module Instance
status_router16.fifo_same_clock	status_router2	Module Instance
mcntrl393.mcntrl_ps_pio.fifo_same_clock	mcntrl_ps_pio	Module Instance
mcntrl393.memctrl16.fifo_same_clock	status_router2	Module Instance
sensors393.histogram_saxi.fifo_same_clock	histogram_saxi	Module Instance
sensors393.status_router4.fifo_same_clock	status_router2	Module Instance
mult_saxi_wr.fifo_same_clock	mult_saxi_wr	Module Instance
axibram_write.fifo_same_clock	axibram_write	Module Instance
axibram_read.fifo_same_clock	axibram_read	Module Instance
fpga_version.vh	x393
frame_num_sync	x393
GENERATE [1067]	mcntrl393	GENERATE
GENERATE [106]	ram18p_var_w_var_r	GENERATE
mcntrl393.GENERATE [107]	ram_var_w_var_r	GENERATE
mcntrl393.mcntrl_ps_pio.GENERATE [107]	ram_var_w_var_r	GENERATE
membridge.GENERATE [107]	ram_var_w_var_r	GENERATE
sensors393.GENERATE [107]	ram_var_w_var_r	GENERATE
mult_saxi_wr_inbuf.GENERATE [107]	ram_var_w_var_r	GENERATE
mult_saxi_wr.GENERATE [107]	ram_var_w_var_r	GENERATE
GENERATE [120]	mult_saxi_wr_inbuf	GENERATE
status_router16.GENERATE [122]	status_router2	GENERATE
status_router16.status_router8.status_router2.GENERATE [122]	status_router2	GENERATE
status_router16.status_router8.status_router4.GENERATE [122]	status_router2	GENERATE
mcntrl393.memctrl16.GENERATE [122]	status_router2	GENERATE
mcntrl393.memctrl16.scheduler16.GENERATE [122]	scheduler16	GENERATE
sensors393.GENERATE [122]	status_router2	GENERATE
mult_saxi_wr_inbuf.GENERATE [123]	ram18_var_w_var_r	GENERATE
mult_saxi_wr.GENERATE [123]	ram18_var_w_var_r	GENERATE
GENERATE [161]	gpio393	GENERATE
GENERATE [295]	cmd_frame_sequencer	GENERATE
GENERATE [335]	compressor393	GENERATE
GENERATE [435]	sensors393	GENERATE
GENERATE [454]	mult_saxi_wr	GENERATE
GENERATE [476]	compressor393	GENERATE
compressor393.GENERATE [50]	dly_16	GENERATE
debug_master.GENERATE [50]	dly_16	GENERATE
GENERATE [51]	level_cross_clocks	GENERATE
cmd_frame_sequencer.GENERATE [63]	cmd_deser	GENERATE
cmd_seq_mux.GENERATE [63]	cmd_deser	GENERATE
mcntrl393.mcntrl_tiled_rw.GENERATE [63]	cmd_deser	GENERATE
mcntrl393.mcntrl_ps_pio.GENERATE [63]	cmd_deser	GENERATE
mcntrl393.memctrl16.cmd_deser.GENERATE [63]	cmd_deser	GENERATE
mcntrl393.memctrl16.mcontr_sequencer.GENERATE [63]	cmd_deser	GENERATE
membridge.GENERATE [63]	cmd_deser	GENERATE
sensors393.GENERATE [63]	cmd_deser	GENERATE
compressor393.GENERATE [63]	cmd_deser	GENERATE
gpio393.GENERATE [63]	cmd_deser	GENERATE
timing393.GENERATE [63]	cmd_deser	GENERATE
event_logger.GENERATE [63]	cmd_deser	GENERATE
mult_saxi_wr.GENERATE [63]	cmd_deser	GENERATE
clocks393m.GENERATE [63]	cmd_deser	GENERATE
debug_master.GENERATE [63]	cmd_deser	GENERATE
cmd_seq_mux.GENERATE [68]	status_generate	GENERATE
mcntrl393.mcntrl_tiled_rw.GENERATE [68]	status_generate	GENERATE
mcntrl393.mcntrl_ps_pio.GENERATE [68]	status_generate	GENERATE
mcntrl393.memctrl16.status_generate.GENERATE [68]	status_generate	GENERATE
mcntrl393.memctrl16.mcontr_sequencer.GENERATE [68]	status_generate	GENERATE
membridge.GENERATE [68]	status_generate	GENERATE
gpio393.GENERATE [68]	status_generate	GENERATE
event_logger.GENERATE [68]	status_generate	GENERATE
mult_saxi_wr.GENERATE [68]	status_generate	GENERATE
clocks393m.GENERATE [68]	status_generate	GENERATE
debug_master.GENERATE [68]	status_generate	GENERATE
GENERATE [77]	sync_resets	GENERATE
GENERATE [866]	x393
gpio393	x393
gpio_bit	gpio393	Module Instance
histogram_saxi	sensors393	Module Instance
IBUF	ibuf_ibufg	Module Instance
ibuf_ibufg	clocks393m	Module Instance
IBUFDS	ibufds_ibufgds	Module Instance
ibufds_ibufgds	clocks393m	Module Instance
idelay_ctrl	sensors393	Module Instance
IDELAYCTRL	idelay_ctrl	Module Instance
imu_exttime393	event_logger	Module Instance
imu_message393	event_logger	Module Instance
imu_spi393	event_logger	Module Instance
imu_timestamps393	event_logger	Module Instance
IOBUF	iobuf	Module Instance
iobuf	gpio393	Module Instance
jp_channel	compressor393	Module Instance
timing393.level_cross_clocks	camsync393	Module Instance
sync_resets.level_cross_clocks	sync_resets	Module Instance
level_cross_clocks_ff_bit	level_cross_clocks	Module Instance
level_cross_clocks_single_bit	level_cross_clocks	Module Instance
level_cross_clocks_sync_bit	level_cross_clocks	Module Instance
logger_arbiter393	event_logger	Module Instance
mcntrl393	x393
mcntrl393_test01	x393
mcntrl393.mcntrl_buf_rd	mcntrl393	Module Instance
mcntrl393.mcntrl_buf_rd	mcntrl393	Module Instance
mcntrl393.mcntrl_buf_rd	mcntrl393	Module Instance
membridge.mcntrl_buf_rd	membridge	Module Instance
compressor393.mcntrl_buf_rd	jp_channel	Module Instance
mcntrl393.mcntrl_buf_wr	mcntrl393	Module Instance
mcntrl393.mcntrl_buf_wr	mcntrl393	Module Instance
mcntrl393.mcntrl_buf_wr	mcntrl393	Module Instance
membridge.mcntrl_buf_wr	membridge	Module Instance
sensors393.mcntrl_buf_wr	sensor_membuf	Module Instance
mcntrl_linear_rw	mcntrl393	Module Instance
mcntrl_linear_rw	mcntrl393	Module Instance
mcntrl_linear_rw	mcntrl393	Module Instance
mcntrl_ps_pio	mcntrl393	Module Instance
mcntrl_tiled_rw	mcntrl393	Module Instance
mcntrl_tiled_rw	mcntrl393	Module Instance
mcntrl_tiled_rw	mcntrl393	Module Instance
membridge	x393
memctrl16	mcntrl393	Module Instance
mult_saxi_wr	x393
mult_saxi_wr_chn	mult_saxi_wr	Module Instance
mult_saxi_wr_chn	mult_saxi_wr	Module Instance
mult_saxi_wr_chn	mult_saxi_wr	Module Instance
mult_saxi_wr_chn	mult_saxi_wr	Module Instance
mult_saxi_wr_inbuf	x393
mult_saxi_wr_pointers	mult_saxi_wr	Module Instance
nmea_decoder393	event_logger	Module Instance
pll_base	clocks393m	Module Instance
PLLE2_ADV	pll_base	Module Instance
PS7	x393
membridge.pulse_cross_clock	membridge	Module Instance
membridge.pulse_cross_clock	membridge	Module Instance
membridge.pulse_cross_clock	membridge	Module Instance
membridge.pulse_cross_clock	membridge	Module Instance
membridge.pulse_cross_clock	membridge	Module Instance
sensors393.sensor_membuf.pulse_cross_clock	sensor_membuf	Module Instance
sensors393.histogram_saxi.pulse_cross_clock	histogram_saxi	Module Instance
compressor393.jp_channel.pulse_cross_clock	jp_channel	Module Instance
compressor393.cmprs_afi_mux.pulse_cross_clock	cmprs_afi_mux	Module Instance
timing393.timestamp_snapshot.pulse_cross_clock	timestamp_snapshot	Module Instance
timing393.camsync393.pulse_cross_clock	camsync393	Module Instance
event_logger.pulse_cross_clock	event_logger	Module Instance
mult_saxi_wr_inbuf.pulse_cross_clock	mult_saxi_wr_inbuf	Module Instance
mult_saxi_wr.pulse_cross_clock	mult_saxi_wr	Module Instance
sata_ahci_top.pulse_cross_clock	ahci_sata_layers	Module Instance
mult_saxi_wr_inbuf.ram18_32w_32r	ram18_var_w_var_r	Module Instance
mult_saxi_wr.ram18_32w_32r	ram18_var_w_var_r	Module Instance
mult_saxi_wr_inbuf.ram18_32w_lt32r	ram18_var_w_var_r	Module Instance
mult_saxi_wr.ram18_32w_lt32r	ram18_var_w_var_r	Module Instance
mult_saxi_wr_inbuf.ram18_declare_init.vh	ram18_var_w_var_r	Include
mult_saxi_wr.ram18_declare_init.vh	ram18_var_w_var_r	Include
sata_ahci_top.ram18_declare_init.vh	ram18p_var_w_var_r	Include
mult_saxi_wr_inbuf.ram18_dummy	ram18_var_w_var_r	Module Instance
mult_saxi_wr.ram18_dummy	ram18_var_w_var_r	Module Instance
mult_saxi_wr_inbuf.ram18_lt32w_32r	ram18_var_w_var_r	Module Instance
mult_saxi_wr.ram18_lt32w_32r	ram18_var_w_var_r	Module Instance
mult_saxi_wr_inbuf.ram18_lt32w_lt32r	ram18_var_w_var_r	Module Instance
mult_saxi_wr.ram18_lt32w_lt32r	ram18_var_w_var_r	Module Instance
mult_saxi_wr_inbuf.ram18_pass_init.vh	ram18_var_w_var_r	Include
mult_saxi_wr.ram18_pass_init.vh	ram18_var_w_var_r	Include
sata_ahci_top.ram18_pass_init.vh	ram18p_var_w_var_r	Include
cmd_frame_sequencer.ram18_var_w_var_r	cmd_frame_sequencer	Module Instance
cmd_frame_sequencer.ram18_var_w_var_r	cmd_frame_sequencer	Module Instance
cmd_frame_sequencer.ram18_var_w_var_r	cmd_frame_sequencer	Module Instance
mult_saxi_wr_inbuf.ram18_var_w_var_r	mult_saxi_wr_inbuf	Module Instance
mult_saxi_wr.ram18_var_w_var_r	mult_saxi_wr	Module Instance
ram18p_32w_32r	ram18p_var_w_var_r	Module Instance
ram18p_32w_lt32r	ram18p_var_w_var_r	Module Instance
ram18p_dummy	ram18p_var_w_var_r	Module Instance
ram18p_lt32w_32r	ram18p_var_w_var_r	Module Instance
ram18p_lt32w_lt32r	ram18p_var_w_var_r	Module Instance
ram18p_var_w_var_r	ahci_sata_layers	Module Instance
mcntrl393.ram36_declare_init.vh	ram_var_w_var_r	Include
mcntrl393.mcntrl_ps_pio.ram36_declare_init.vh	ram_var_w_var_r	Include
membridge.ram36_declare_init.vh	ram_var_w_var_r	Include
sensors393.ram36_declare_init.vh	ram_var_w_var_r	Include
mult_saxi_wr_inbuf.ram36_declare_init.vh	ram_var_w_var_r	Include
mult_saxi_wr.ram36_declare_init.vh	ram_var_w_var_r	Include
mcntrl393.ram36_pass_init.vh	ram_var_w_var_r	Include
mcntrl393.mcntrl_ps_pio.ram36_pass_init.vh	ram_var_w_var_r	Include
membridge.ram36_pass_init.vh	ram_var_w_var_r	Include
sensors393.ram36_pass_init.vh	ram_var_w_var_r	Include
mult_saxi_wr_inbuf.ram36_pass_init.vh	ram_var_w_var_r	Include
mult_saxi_wr.ram36_pass_init.vh	ram_var_w_var_r	Include
mcntrl393.ram_64w_64r	ram_var_w_var_r	Module Instance
mcntrl393.mcntrl_ps_pio.ram_64w_64r	ram_var_w_var_r	Module Instance
membridge.ram_64w_64r	ram_var_w_var_r	Module Instance
sensors393.ram_64w_64r	ram_var_w_var_r	Module Instance
mult_saxi_wr_inbuf.ram_64w_64r	ram_var_w_var_r	Module Instance
mult_saxi_wr.ram_64w_64r	ram_var_w_var_r	Module Instance
mcntrl393.ram_64w_lt64r	ram_var_w_var_r	Module Instance
mcntrl393.mcntrl_ps_pio.ram_64w_lt64r	ram_var_w_var_r	Module Instance
membridge.ram_64w_lt64r	ram_var_w_var_r	Module Instance
sensors393.ram_64w_lt64r	ram_var_w_var_r	Module Instance
mult_saxi_wr_inbuf.ram_64w_lt64r	ram_var_w_var_r	Module Instance
mult_saxi_wr.ram_64w_lt64r	ram_var_w_var_r	Module Instance
mcntrl393.ram_dummy	ram_var_w_var_r	Module Instance
mcntrl393.mcntrl_ps_pio.ram_dummy	ram_var_w_var_r	Module Instance
membridge.ram_dummy	ram_var_w_var_r	Module Instance
sensors393.ram_dummy	ram_var_w_var_r	Module Instance
mult_saxi_wr_inbuf.ram_dummy	ram_var_w_var_r	Module Instance
mult_saxi_wr.ram_dummy	ram_var_w_var_r	Module Instance
mcntrl393.ram_lt64w_64r	ram_var_w_var_r	Module Instance
mcntrl393.mcntrl_ps_pio.ram_lt64w_64r	ram_var_w_var_r	Module Instance
membridge.ram_lt64w_64r	ram_var_w_var_r	Module Instance
sensors393.ram_lt64w_64r	ram_var_w_var_r	Module Instance
mult_saxi_wr_inbuf.ram_lt64w_64r	ram_var_w_var_r	Module Instance
mult_saxi_wr.ram_lt64w_64r	ram_var_w_var_r	Module Instance
mcntrl393.ram_lt64w_lt64r	ram_var_w_var_r	Module Instance
mcntrl393.mcntrl_ps_pio.ram_lt64w_lt64r	ram_var_w_var_r	Module Instance
membridge.ram_lt64w_lt64r	ram_var_w_var_r	Module Instance
sensors393.ram_lt64w_lt64r	ram_var_w_var_r	Module Instance
mult_saxi_wr_inbuf.ram_lt64w_lt64r	ram_var_w_var_r	Module Instance
mult_saxi_wr.ram_lt64w_lt64r	ram_var_w_var_r	Module Instance
cmd_frame_sequencer.ram_var_w_var_r	cmd_frame_sequencer	Module Instance
cmd_frame_sequencer.ram_var_w_var_r	cmd_frame_sequencer	Module Instance
cmd_frame_sequencer.ram_var_w_var_r	cmd_frame_sequencer	Module Instance
cmd_frame_sequencer.ram_var_w_var_r	cmd_frame_sequencer	Module Instance
mcntrl393.mcntrl_buf_rd.ram_var_w_var_r	mcntrl_buf_rd	Module Instance
mcntrl393.mcntrl_buf_wr.ram_var_w_var_r	mcntrl_buf_wr	Module Instance
mcntrl393.mcntrl_ps_pio.mcntrl_buf_rd.ram_var_w_var_r	mcntrl_buf_rd	Module Instance
mcntrl393.mcntrl_ps_pio.mcntrl_buf_wr.ram_var_w_var_r	mcntrl_buf_wr	Module Instance
membridge.mcntrl_buf_rd.ram_var_w_var_r	mcntrl_buf_rd	Module Instance
membridge.mcntrl_buf_wr.ram_var_w_var_r	mcntrl_buf_wr	Module Instance
sensors393.sensor_membuf.ram_var_w_var_r	mcntrl_buf_wr	Module Instance
sensors393.histogram_saxi.ram_var_w_var_r	histogram_saxi	Module Instance
mult_saxi_wr_inbuf.ram_var_w_var_r	mult_saxi_wr_inbuf	Module Instance
mult_saxi_wr.ram_var_w_var_r	mult_saxi_wr	Module Instance
round_robin	mult_saxi_wr	Module Instance
round_robin	mult_saxi_wr	Module Instance
rs232_rcv393	event_logger	Module Instance
rtc393	timing393	Module Instance
sata_ahci_top	x393
select_clk_buf	clocks393m	Module Instance
select_clk_buf	clocks393m	Module Instance
select_clk_buf	clocks393m	Module Instance
select_clk_buf	clocks393m	Module Instance
sensor_channel	sensors393	Module Instance
sensor_membuf	sensors393	Module Instance
sensors393	x393
mcntrl393_test01.status_generate	mcntrl393_test01	Module Instance
mcntrl393_test01.status_generate	mcntrl393_test01	Module Instance
mcntrl393_test01.status_generate	mcntrl393_test01	Module Instance
mcntrl393_test01.status_generate	mcntrl393_test01	Module Instance
cmd_seq_mux.status_generate	cmd_seq_mux	Module Instance
mcntrl393.mcntrl_linear_rw.status_generate	mcntrl_linear_rw	Module Instance
mcntrl393.mcntrl_tiled_rw.status_generate	mcntrl_tiled_rw	Module Instance
mcntrl393.mcntrl_ps_pio.status_generate	mcntrl_ps_pio	Module Instance
mcntrl393.memctrl16.status_generate	memctrl16	Module Instance
membridge.status_generate	membridge	Module Instance
compressor393.jp_channel.status_generate	jp_channel	Module Instance
compressor393.cmprs_afi_mux.status_generate	cmprs_afi_mux_status	Module Instance
gpio393.status_generate	gpio393	Module Instance
timing393.status_generate	rtc393	Module Instance
event_logger.status_generate	event_logger	Module Instance
mult_saxi_wr.status_generate	mult_saxi_wr	Module Instance
clocks393m.status_generate	clocks393m	Module Instance
debug_master.status_generate	debug_master	Module Instance
cmd_seq_mux.status_generate_extra	status_generate	Module Instance
mcntrl393.mcntrl_tiled_rw.status_generate_extra	status_generate	Module Instance
mcntrl393.mcntrl_ps_pio.status_generate_extra	status_generate	Module Instance
mcntrl393.memctrl16.status_generate.status_generate_extra	status_generate	Module Instance
mcntrl393.memctrl16.mcontr_sequencer.status_generate_extra	status_generate	Module Instance
membridge.status_generate_extra	status_generate	Module Instance
gpio393.status_generate_extra	status_generate	Module Instance
event_logger.status_generate_extra	status_generate	Module Instance
mult_saxi_wr.status_generate_extra	status_generate	Module Instance
clocks393m.status_generate_extra	status_generate	Module Instance
debug_master.status_generate_extra	status_generate	Module Instance
cmd_seq_mux.status_generate_only	status_generate	Module Instance
mcntrl393.mcntrl_tiled_rw.status_generate_only	status_generate	Module Instance
mcntrl393.mcntrl_ps_pio.status_generate_only	status_generate	Module Instance
mcntrl393.memctrl16.status_generate.status_generate_only	status_generate	Module Instance
mcntrl393.memctrl16.mcontr_sequencer.status_generate_only	status_generate	Module Instance
membridge.status_generate_only	status_generate	Module Instance
gpio393.status_generate_only	status_generate	Module Instance
event_logger.status_generate_only	status_generate	Module Instance
mult_saxi_wr.status_generate_only	status_generate	Module Instance
clocks393m.status_generate_only	status_generate	Module Instance
debug_master.status_generate_only	status_generate	Module Instance
status_read	x393
status_router16	x393
status_router16.status_router2	status_router16	Module Instance
mcntrl393.status_router16.status_router2	status_router16	Module Instance
mcntrl393.memctrl16.status_router2	memctrl16	Module Instance
sensors393.sensor_channel.status_router2	sensor_channel	Module Instance
mcntrl393_test01.status_router4	mcntrl393_test01	Module Instance
status_router16.status_router4	status_router8	Module Instance
sensors393.status_router4	sensors393	Module Instance
compressor393.status_router8.status_router4	status_router8	Module Instance
compressor393.cmprs_afi_mux.status_router4	cmprs_afi_mux_status	Module Instance
status_router16.status_router8	status_router16	Module Instance
status_router16.status_router8	status_router16	Module Instance
compressor393.status_router8	compressor393	Module Instance
sync_resets	x393
timestamp_fifo	imu_exttime393	Module Instance
timestamp_snapshot	timing393	Module Instance
timestamp_snapshot	timing393	Module Instance
timestamp_snapshot	timing393	Module Instance
timestamp_snapshot	timing393	Module Instance
timestamp_snapshot	timing393	Module Instance
timestamp_to_parallel	camsync393	Module Instance
timing393	x393
x393_parameters.vh	x393