00001
00002
00003
00004
00005
00006
00007
00008
00009
00010
00011
00012
00013
00014
00015
00016
00017
00018
00019
00020
00021
00022
00023
00024
00025
00026
00027
00028
00029
00030
00031
00032
00033
00034
00035
00036
00037
00038
00039
00040
00041
00042
00043
00044
00045
00046
00047
00048
00049
00050
00051
00052
00053
00054
00055
00056
00057
00058
00059
00060 #ifndef __LINUX_MTD_NAND_H
00061 #define __LINUX_MTD_NAND_H
00062
00063 #if 0
00064 #include <linux/config.h>
00065 #include <linux/wait.h>
00066 #include <linux/spinlock.h>
00067 #include <linux/mtd/mtd.h>
00068 #endif
00069
00070 #include "mtd.h"
00071
00072 struct mtd_info;
00073
00074 extern int nand_scan (struct mtd_info *mtd, int max_chips);
00075
00076 extern void nand_release (struct mtd_info *mtd);
00077
00078
00079 extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, size_t ooblen);
00080
00081
00082
00083 #define NAND_MAX_CHIPS 8
00084
00085
00086
00087
00088
00089 #define NAND_MAX_OOBSIZE 64
00090
00091
00092
00093
00094
00095 #define NAND_CTL_SETNCE 1
00096
00097 #define NAND_CTL_CLRNCE 2
00098
00099 #define NAND_CTL_SETCLE 3
00100
00101 #define NAND_CTL_CLRCLE 4
00102
00103 #define NAND_CTL_SETALE 5
00104
00105 #define NAND_CTL_CLRALE 6
00106
00107 #define NAND_CTL_SETWP 7
00108
00109 #define NAND_CTL_CLRWP 8
00110
00111
00112
00113
00114 #define NAND_CMD_READ0 0
00115 #define NAND_CMD_READ1 1
00116 #define NAND_CMD_PAGEPROG 0x10
00117 #define NAND_CMD_READOOB 0x50
00118 #define NAND_CMD_ERASE1 0x60
00119 #define NAND_CMD_STATUS 0x70
00120 #define NAND_CMD_STATUS_MULTI 0x71
00121 #define NAND_CMD_SEQIN 0x80
00122 #define NAND_CMD_READID 0x90
00123 #define NAND_CMD_ERASE2 0xd0
00124 #define NAND_CMD_RESET 0xff
00125
00126
00127 #define NAND_CMD_READSTART 0x30
00128 #define NAND_CMD_CACHEDPROG 0x15
00129
00130
00131
00132
00133
00134
00135
00136
00137 #define NAND_CMD_DEPLETE1 0x100
00138 #define NAND_CMD_DEPLETE2 0x38
00139 #define NAND_CMD_STATUS_MULTI 0x71
00140 #define NAND_CMD_STATUS_ERROR 0x72
00141
00142 #define NAND_CMD_STATUS_ERROR0 0x73
00143 #define NAND_CMD_STATUS_ERROR1 0x74
00144 #define NAND_CMD_STATUS_ERROR2 0x75
00145 #define NAND_CMD_STATUS_ERROR3 0x76
00146 #define NAND_CMD_STATUS_RESET 0x7f
00147 #define NAND_CMD_STATUS_CLEAR 0xff
00148
00149
00150 #define NAND_STATUS_FAIL 0x01
00151 #define NAND_STATUS_FAIL_N1 0x02
00152 #define NAND_STATUS_TRUE_READY 0x20
00153 #define NAND_STATUS_READY 0x40
00154 #define NAND_STATUS_WP 0x80
00155
00156
00157
00158
00159
00160
00161 #define NAND_ECC_NONE 0
00162
00163 #define NAND_ECC_SOFT 1
00164
00165 #define NAND_ECC_HW3_256 2
00166
00167 #define NAND_ECC_HW3_512 3
00168
00169 #define NAND_ECC_HW6_512 4
00170
00171 #define NAND_ECC_HW8_512 6
00172
00173 #define NAND_ECC_HW12_2048 7
00174
00175
00176
00177
00178
00179 #define NAND_ECC_READ 0
00180
00181 #define NAND_ECC_WRITE 1
00182
00183 #define NAND_ECC_READSYN 2
00184
00185
00186 #define NAND_GET_DEVICE 0x80
00187
00188
00189
00190
00191
00192
00193 #define NAND_NO_AUTOINCR 0x00000001
00194
00195 #define NAND_BUSWIDTH_16 0x00000002
00196
00197 #define NAND_NO_PADDING 0x00000004
00198
00199 #define NAND_CACHEPRG 0x00000008
00200
00201 #define NAND_COPYBACK 0x00000010
00202
00203
00204 #define NAND_IS_AND 0x00000020
00205
00206
00207 #define NAND_4PAGE_ARRAY 0x00000040
00208
00209
00210
00211 #define BBT_AUTO_REFRESH 0x00000080
00212
00213
00214 #define NAND_SAMSUNG_LP_OPTIONS \
00215 (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK)
00216
00217
00218 #define NAND_CANAUTOINCR(chip) (!(chip->options & NAND_NO_AUTOINCR))
00219 #define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING))
00220 #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))
00221 #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))
00222
00223
00224 #define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR)
00225
00226
00227
00228
00229 #define NAND_USE_FLASH_BBT 0x00010000
00230
00231
00232
00233 #define NAND_HWECC_SYNDROME 0x00020000
00234
00235 #define NAND_SKIP_BBTSCAN 0x00040000
00236
00237
00238
00239 #define NAND_OOBBUF_ALLOC 0x40000000
00240
00241 #define NAND_DATABUF_ALLOC 0x80000000
00242
00243
00244
00245
00246
00247
00248 typedef enum {
00249 FL_READY,
00250 FL_READING,
00251 FL_WRITING,
00252 FL_ERASING,
00253 FL_SYNCING,
00254 FL_CACHEDPRG,
00255 FL_PM_SUSPENDED,
00256 } nand_state_t;
00257
00258
00259 struct nand_chip;
00260
00268 struct nand_hw_control {
00269 spinlock_t lock;
00270 struct nand_chip *active;
00271 wait_queue_head_t wq;
00272 };
00273
00334 struct nand_chip {
00335 void __iomem *IO_ADDR_R;
00336 void __iomem *IO_ADDR_W;
00337
00338 u_char (*read_byte)(struct mtd_info *mtd);
00339 void (*write_byte)(struct mtd_info *mtd, u_char byte);
00340 u16 (*read_word)(struct mtd_info *mtd);
00341 void (*write_word)(struct mtd_info *mtd, u16 word);
00342
00343 void (*write_buf)(struct mtd_info *mtd, const u_char *buf, int len);
00344 void (*read_buf)(struct mtd_info *mtd, u_char *buf, int len);
00345 int (*verify_buf)(struct mtd_info *mtd, const u_char *buf, int len);
00346 void (*select_chip)(struct mtd_info *mtd, int chip);
00347 int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip);
00348 int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
00349 void (*hwcontrol)(struct mtd_info *mtd, int cmd);
00350 int (*dev_ready)(struct mtd_info *mtd);
00351 void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr);
00352 int (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this, int state);
00353 int (*calculate_ecc)(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code);
00354 int (*correct_data)(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc);
00355 void (*enable_hwecc)(struct mtd_info *mtd, int mode);
00356 void (*erase_cmd)(struct mtd_info *mtd, int page);
00357 int (*scan_bbt)(struct mtd_info *mtd);
00358 int eccmode;
00359 int eccsize;
00360 int eccbytes;
00361 int eccsteps;
00362 int chip_delay;
00363 spinlock_t chip_lock;
00364 wait_queue_head_t wq;
00365 nand_state_t state;
00366 int page_shift;
00367 int phys_erase_shift;
00368 int bbt_erase_shift;
00369 int chip_shift;
00370 u_char *data_buf;
00371 u_char *oob_buf;
00372 int oobdirty;
00373 u_char *data_poi;
00374 unsigned int options;
00375 int badblockpos;
00376 int numchips;
00377 unsigned long chipsize;
00378 int pagemask;
00379 int pagebuf;
00380 struct nand_oobinfo *autooob;
00381 uint8_t *bbt;
00382 struct nand_bbt_descr *bbt_td;
00383 struct nand_bbt_descr *bbt_md;
00384 struct nand_bbt_descr *badblock_pattern;
00385 struct nand_hw_control *controller;
00386 void *priv;
00387 int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page);
00388 };
00389
00390
00391
00392
00393 #define NAND_MFR_TOSHIBA 0x98
00394 #define NAND_MFR_SAMSUNG 0xec
00395 #define NAND_MFR_FUJITSU 0x04
00396 #define NAND_MFR_NATIONAL 0x8f
00397 #define NAND_MFR_RENESAS 0x07
00398 #define NAND_MFR_STMICRO 0x20
00399 #define NAND_MFR_HYNIX 0xad
00400
00414 struct nand_flash_dev {
00415 char *name;
00416 int id;
00417 unsigned long pagesize;
00418 unsigned long chipsize;
00419 unsigned long erasesize;
00420 unsigned long options;
00421 };
00422
00428 struct nand_manufacturers {
00429 int id;
00430 char * name;
00431 };
00432
00433 extern struct nand_flash_dev nand_flash_ids[];
00434 extern struct nand_manufacturers nand_manuf_ids[];
00435
00459 struct nand_bbt_descr {
00460 int options;
00461 int pages[NAND_MAX_CHIPS];
00462 int offs;
00463 int veroffs;
00464 uint8_t version[NAND_MAX_CHIPS];
00465 int len;
00466 int maxblocks;
00467 int reserved_block_code;
00468 uint8_t *pattern;
00469 };
00470
00471
00472
00473
00474 #define NAND_BBT_NRBITS_MSK 0x0000000F
00475 #define NAND_BBT_1BIT 0x00000001
00476 #define NAND_BBT_2BIT 0x00000002
00477 #define NAND_BBT_4BIT 0x00000004
00478 #define NAND_BBT_8BIT 0x00000008
00479
00480 #define NAND_BBT_LASTBLOCK 0x00000010
00481
00482 #define NAND_BBT_ABSPAGE 0x00000020
00483
00484 #define NAND_BBT_SEARCH 0x00000040
00485
00486 #define NAND_BBT_PERCHIP 0x00000080
00487
00488 #define NAND_BBT_VERSION 0x00000100
00489
00490 #define NAND_BBT_CREATE 0x00000200
00491
00492 #define NAND_BBT_SCANALLPAGES 0x00000400
00493
00494 #define NAND_BBT_SCANEMPTY 0x00000800
00495
00496 #define NAND_BBT_WRITE 0x00001000
00497
00498 #define NAND_BBT_SAVECONTENT 0x00002000
00499
00500 #define NAND_BBT_SCAN2NDPAGE 0x00004000
00501
00502
00503 #define NAND_BBT_SCAN_MAXBLOCKS 4
00504
00505 extern int nand_scan_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd);
00506 extern int nand_update_bbt (struct mtd_info *mtd, loff_t offs);
00507 extern int nand_default_bbt (struct mtd_info *mtd);
00508 extern int nand_isbad_bbt (struct mtd_info *mtd, loff_t offs, int allowbbt);
00509 extern int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbbt);
00510 extern int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
00511 size_t * retlen, u_char * buf, u_char * oob_buf,
00512 struct nand_oobinfo *oobsel, int flags);
00513
00514
00515
00516
00517 #define NAND_SMALL_BADBLOCK_POS 5
00518 #define NAND_LARGE_BADBLOCK_POS 0
00519
00520 #endif