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00020 #ifndef __LINUX_MTD_NAND_H
00021 #define __LINUX_MTD_NAND_H
00022
00023 #include <linux/wait.h>
00024 #include <linux/spinlock.h>
00025 #include <linux/mtd/mtd.h>
00026
00027 struct mtd_info;
00028
00029 extern int nand_scan (struct mtd_info *mtd, int max_chips);
00030
00031
00032 extern int nand_scan_ident(struct mtd_info *mtd, int max_chips);
00033 extern int nand_scan_tail(struct mtd_info *mtd);
00034
00035
00036 extern void nand_release (struct mtd_info *mtd);
00037
00038
00039 extern void nand_wait_ready(struct mtd_info *mtd);
00040
00041
00042 #define NAND_MAX_CHIPS 8
00043
00044
00045
00046
00047
00048 #define NAND_MAX_OOBSIZE 64
00049 #define NAND_MAX_PAGESIZE 2048
00050
00051
00052
00053
00054
00055
00056
00057
00058 #define NAND_NCE 0x01
00059
00060 #define NAND_CLE 0x02
00061
00062 #define NAND_ALE 0x04
00063
00064 #define NAND_CTRL_CLE (NAND_NCE | NAND_CLE)
00065 #define NAND_CTRL_ALE (NAND_NCE | NAND_ALE)
00066 #define NAND_CTRL_CHANGE 0x80
00067
00068
00069
00070
00071 #define NAND_CMD_READ0 0
00072 #define NAND_CMD_READ1 1
00073 #define NAND_CMD_RNDOUT 5
00074 #define NAND_CMD_PAGEPROG 0x10
00075 #define NAND_CMD_READOOB 0x50
00076 #define NAND_CMD_ERASE1 0x60
00077 #define NAND_CMD_STATUS 0x70
00078 #define NAND_CMD_STATUS_MULTI 0x71
00079 #define NAND_CMD_SEQIN 0x80
00080 #define NAND_CMD_RNDIN 0x85
00081 #define NAND_CMD_READID 0x90
00082 #define NAND_CMD_ERASE2 0xd0
00083 #define NAND_CMD_RESET 0xff
00084
00085
00086 #define NAND_CMD_READSTART 0x30
00087 #define NAND_CMD_RNDOUTSTART 0xE0
00088 #define NAND_CMD_CACHEDPROG 0x15
00089
00090
00091
00092
00093
00094
00095
00096
00097 #define NAND_CMD_DEPLETE1 0x100
00098 #define NAND_CMD_DEPLETE2 0x38
00099 #define NAND_CMD_STATUS_MULTI 0x71
00100 #define NAND_CMD_STATUS_ERROR 0x72
00101
00102 #define NAND_CMD_STATUS_ERROR0 0x73
00103 #define NAND_CMD_STATUS_ERROR1 0x74
00104 #define NAND_CMD_STATUS_ERROR2 0x75
00105 #define NAND_CMD_STATUS_ERROR3 0x76
00106 #define NAND_CMD_STATUS_RESET 0x7f
00107 #define NAND_CMD_STATUS_CLEAR 0xff
00108
00109 #define NAND_CMD_NONE -1
00110
00111
00112 #define NAND_STATUS_FAIL 0x01
00113 #define NAND_STATUS_FAIL_N1 0x02
00114 #define NAND_STATUS_TRUE_READY 0x20
00115 #define NAND_STATUS_READY 0x40
00116 #define NAND_STATUS_WP 0x80
00117
00118
00119
00120
00121 typedef enum {
00122 NAND_ECC_NONE,
00123 NAND_ECC_SOFT,
00124 NAND_ECC_HW,
00125 NAND_ECC_HW_SYNDROME,
00126 } nand_ecc_modes_t;
00127
00128
00129
00130
00131
00132 #define NAND_ECC_READ 0
00133
00134 #define NAND_ECC_WRITE 1
00135
00136 #define NAND_ECC_READSYN 2
00137
00138
00139 #define NAND_GET_DEVICE 0x80
00140
00141
00142
00143
00144
00145
00146 #define NAND_NO_AUTOINCR 0x00000001
00147
00148 #define NAND_BUSWIDTH_16 0x00000002
00149
00150 #define NAND_NO_PADDING 0x00000004
00151
00152 #define NAND_CACHEPRG 0x00000008
00153
00154 #define NAND_COPYBACK 0x00000010
00155
00156
00157 #define NAND_IS_AND 0x00000020
00158
00159
00160 #define NAND_4PAGE_ARRAY 0x00000040
00161
00162
00163
00164 #define BBT_AUTO_REFRESH 0x00000080
00165
00166
00167
00168 #define NAND_NO_READRDY 0x00000100
00169
00170
00171 #define NAND_SAMSUNG_LP_OPTIONS \
00172 (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK)
00173
00174
00175 #define NAND_CANAUTOINCR(chip) (!(chip->options & NAND_NO_AUTOINCR))
00176 #define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING))
00177 #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))
00178 #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))
00179
00180
00181 #define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR)
00182
00183
00184
00185
00186 #define NAND_USE_FLASH_BBT 0x00010000
00187
00188 #define NAND_SKIP_BBTSCAN 0x00020000
00189
00190
00191 #define NAND_OWN_BUFFERS 0x00040000
00192
00193
00194 #define NAND_CONTROLLER_ALLOC 0x80000000
00195
00196
00197
00198
00199
00200
00201 typedef enum {
00202 FL_READY,
00203 FL_READING,
00204 FL_WRITING,
00205 FL_ERASING,
00206 FL_SYNCING,
00207 FL_CACHEDPRG,
00208 FL_PM_SUSPENDED,
00209 } nand_state_t;
00210
00211
00212 struct nand_chip;
00213
00221 struct nand_hw_control {
00222 spinlock_t lock;
00223 struct nand_chip *active;
00224 wait_queue_head_t wq;
00225 };
00226
00248 struct nand_ecc_ctrl {
00249 nand_ecc_modes_t mode;
00250 int steps;
00251 int size;
00252 int bytes;
00253 int total;
00254 int prepad;
00255 int postpad;
00256 struct nand_ecclayout *layout;
00257 void (*hwctl)(struct mtd_info *mtd, int mode);
00258 int (*calculate)(struct mtd_info *mtd,
00259 const uint8_t *dat,
00260 uint8_t *ecc_code);
00261 int (*correct)(struct mtd_info *mtd, uint8_t *dat,
00262 uint8_t *read_ecc,
00263 uint8_t *calc_ecc);
00264 int (*read_page_raw)(struct mtd_info *mtd,
00265 struct nand_chip *chip,
00266 uint8_t *buf);
00267 void (*write_page_raw)(struct mtd_info *mtd,
00268 struct nand_chip *chip,
00269 const uint8_t *buf);
00270 int (*read_page)(struct mtd_info *mtd,
00271 struct nand_chip *chip,
00272 uint8_t *buf);
00273 void (*write_page)(struct mtd_info *mtd,
00274 struct nand_chip *chip,
00275 const uint8_t *buf);
00276 int (*read_oob)(struct mtd_info *mtd,
00277 struct nand_chip *chip,
00278 int page,
00279 int sndcmd);
00280 int (*write_oob)(struct mtd_info *mtd,
00281 struct nand_chip *chip,
00282 int page);
00283 };
00284
00296 struct nand_buffers {
00297 uint8_t ecccalc[NAND_MAX_OOBSIZE];
00298 uint8_t ecccode[NAND_MAX_OOBSIZE];
00299 uint8_t oobwbuf[NAND_MAX_OOBSIZE];
00300 uint8_t databuf[NAND_MAX_PAGESIZE];
00301 uint8_t oobrbuf[NAND_MAX_OOBSIZE];
00302 };
00303
00361 struct nand_chip {
00362 void __iomem *IO_ADDR_R;
00363 void __iomem *IO_ADDR_W;
00364
00365 uint8_t (*read_byte)(struct mtd_info *mtd);
00366 u16 (*read_word)(struct mtd_info *mtd);
00367 void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
00368 void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len);
00369 int (*verify_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
00370 void (*select_chip)(struct mtd_info *mtd, int chip);
00371 int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip);
00372 int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
00373 void (*cmd_ctrl)(struct mtd_info *mtd, int dat,
00374 unsigned int ctrl);
00375 int (*dev_ready)(struct mtd_info *mtd);
00376 void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr);
00377 int (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this);
00378 void (*erase_cmd)(struct mtd_info *mtd, int page);
00379 int (*scan_bbt)(struct mtd_info *mtd);
00380 int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page);
00381 int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
00382 const uint8_t *buf, int page, int cached, int raw);
00383
00384 int chip_delay;
00385 unsigned int options;
00386 unsigned int full_id;
00387
00388 int page_shift;
00389 int phys_erase_shift;
00390 int bbt_erase_shift;
00391 int chip_shift;
00392 int numchips;
00393 unsigned long chipsize;
00394 int pagemask;
00395 int pagebuf;
00396 int badblockpos;
00397
00398 nand_state_t state;
00399
00400 uint8_t *oob_poi;
00401 struct nand_hw_control *controller;
00402 struct nand_ecclayout *ecclayout;
00403
00404 struct nand_ecc_ctrl ecc;
00405 struct nand_buffers *buffers;
00406 struct nand_hw_control hwcontrol;
00407
00408 struct mtd_oob_ops ops;
00409
00410 uint8_t *bbt;
00411 struct nand_bbt_descr *bbt_td;
00412 struct nand_bbt_descr *bbt_md;
00413
00414 struct nand_bbt_descr *badblock_pattern;
00415
00416 void *priv;
00417 };
00418
00419
00420
00421
00422 #define NAND_MFR_TOSHIBA 0x98
00423 #define NAND_MFR_SAMSUNG 0xec
00424 #define NAND_MFR_FUJITSU 0x04
00425 #define NAND_MFR_NATIONAL 0x8f
00426 #define NAND_MFR_RENESAS 0x07
00427 #define NAND_MFR_STMICRO 0x20
00428 #define NAND_MFR_HYNIX 0xad
00429
00442 struct nand_flash_dev {
00443 char *name;
00444 int id;
00445 unsigned long pagesize;
00446 unsigned long chipsize;
00447 unsigned long erasesize;
00448 unsigned long options;
00449 };
00450
00456 struct nand_manufacturers {
00457 int id;
00458 char * name;
00459 };
00460
00461 extern struct nand_flash_dev nand_flash_ids[];
00462 extern struct nand_manufacturers nand_manuf_ids[];
00463
00487 struct nand_bbt_descr {
00488 int options;
00489 int pages[NAND_MAX_CHIPS];
00490 int offs;
00491 int veroffs;
00492 uint8_t version[NAND_MAX_CHIPS];
00493 int len;
00494 int maxblocks;
00495 int reserved_block_code;
00496 uint8_t *pattern;
00497 };
00498
00499
00500
00501
00502 #define NAND_BBT_NRBITS_MSK 0x0000000F
00503 #define NAND_BBT_1BIT 0x00000001
00504 #define NAND_BBT_2BIT 0x00000002
00505 #define NAND_BBT_4BIT 0x00000004
00506 #define NAND_BBT_8BIT 0x00000008
00507
00508 #define NAND_BBT_LASTBLOCK 0x00000010
00509
00510 #define NAND_BBT_ABSPAGE 0x00000020
00511
00512 #define NAND_BBT_SEARCH 0x00000040
00513
00514 #define NAND_BBT_PERCHIP 0x00000080
00515
00516 #define NAND_BBT_VERSION 0x00000100
00517
00518 #define NAND_BBT_CREATE 0x00000200
00519
00520 #define NAND_BBT_SCANALLPAGES 0x00000400
00521
00522 #define NAND_BBT_SCANEMPTY 0x00000800
00523
00524 #define NAND_BBT_WRITE 0x00001000
00525
00526 #define NAND_BBT_SAVECONTENT 0x00002000
00527
00528 #define NAND_BBT_SCAN2NDPAGE 0x00004000
00529
00530
00531 #define NAND_BBT_SCAN_MAXBLOCKS 4
00532
00533 extern int nand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd);
00534 extern int nand_update_bbt(struct mtd_info *mtd, loff_t offs);
00535 extern int nand_default_bbt(struct mtd_info *mtd);
00536 extern int nand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt);
00537 extern int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
00538 int allowbbt);
00539 extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len,
00540 size_t * retlen, uint8_t * buf);
00541
00542
00543
00544
00545 #define NAND_SMALL_BADBLOCK_POS 5
00546 #define NAND_LARGE_BADBLOCK_POS 0
00547
00559 struct platform_nand_chip {
00560 int nr_chips;
00561 int chip_offset;
00562 int nr_partitions;
00563 struct mtd_partition *partitions;
00564 struct nand_ecclayout *ecclayout;
00565 int chip_delay;
00566 unsigned int options;
00567 void *priv;
00568 };
00569
00579 struct platform_nand_ctrl {
00580 void (*hwcontrol)(struct mtd_info *mtd, int cmd);
00581 int (*dev_ready)(struct mtd_info *mtd);
00582 void (*select_chip)(struct mtd_info *mtd, int chip);
00583 void *priv;
00584 };
00585
00586
00587 static inline
00588 struct platform_nand_chip *get_platform_nandchip(struct mtd_info *mtd)
00589 {
00590 struct nand_chip *chip = mtd->priv;
00591
00592 return chip->priv;
00593 }
00594
00595 #endif