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00007 #ifndef _ETRAX_ETHERNET_H_
00008 #define _ETRAX_ETHERNET_H_
00009
00010 #include <asm/arch/hwregs/dma.h>
00011
00012
00013 #define MAX_MEDIA_DATA_SIZE 1522
00014
00015 #define NBR_RX_DESC 64
00016 #define NBR_TX_DESC 32
00017 #ifdef CONFIG_CRIS_MACH_ARTPEC3
00018 #define NBR_INTMEM_RX_DESC 16
00019
00020
00021
00022 #define NBR_INTMEM_TX_BUF 4
00023
00024
00025
00026 #endif
00027
00028
00029
00030
00031
00032 #define RX_COPYBREAK (256)
00033
00034 #define ETHER_HEAD_LEN (14)
00035
00036
00037
00038
00039 #define MDIO_START 0x1
00040 #define MDIO_READ 0x2
00041 #define MDIO_WRITE 0x1
00042 #define MDIO_PREAMBLE 0xfffffffful
00043
00044
00045 #define MDIO_AUX_CTRL_STATUS_REG 0x18
00046 #define MDIO_BC_FULL_DUPLEX_IND 0x1
00047 #define MDIO_BC_SPEED 0x2
00048
00049
00050 #define MDIO_TDK_DIAGNOSTIC_REG 18
00051 #define MDIO_TDK_DIAGNOSTIC_RATE 0x400
00052 #define MDIO_TDK_DIAGNOSTIC_DPLX 0x800
00053
00054
00055 #define MDIO_INT_STATUS_REG_2 0x0011
00056 #define MDIO_INT_FULL_DUPLEX_IND ( 0x0001 << 9 )
00057 #define MDIO_INT_SPEED ( 0x0001 << 14 )
00058
00059
00060 #define MDIO_NAT_LINK_AN_REG 0x11
00061 #define MDIO_NAT_1000 (0x0001 << 4)
00062 #define MDIO_NAT_100 (0x0001 << 3)
00063 #define MDIO_NAT_FULL_DUPLEX_IND (0x0001 << 1)
00064
00065
00066 #define MDIO_VIT_AUX_STAT 0x1c
00067 #define MDIO_VIT_1000 (0x2 << 3)
00068 #define MDIO_VIT_100 (0x1 << 3)
00069 #define MDIO_VIT_10 0
00070 #define MDIO_VIT_FD (0x1 << 5)
00071
00072
00073 #define NET_FLASH_TIME (HZ/50)
00074 #define NET_FLASH_PAUSE (HZ/100)
00075 #define NET_LINK_UP_CHECK_INTERVAL (2*HZ)
00076 #define NET_DUPLEX_CHECK_INTERVAL (2*HZ)
00077
00078
00079 enum duplex {
00080 half,
00081 full,
00082 autoneg
00083 };
00084
00085
00086 struct transceiver_ops {
00087 unsigned int oui;
00088 void (*check_speed) (struct net_device * dev);
00089 void (*check_duplex) (struct net_device * dev);
00090 };
00091
00092 typedef struct crisv32_eth_descr {
00093 dma_descr_data descr __attribute__ ((__aligned__(32)));
00094 struct sk_buff *skb;
00095 unsigned char *linearized_packet;
00096 } crisv32_eth_descr;
00097
00098
00099
00100 #ifdef CONFIG_CRIS_MACH_ARTPEC3
00101 struct tx_buffer_list {
00102 struct tx_buffer_list *next;
00103 unsigned char *buf;
00104 char free;
00105 };
00106 #endif
00107
00108
00109 #define LED_GRP_0 0
00110 #define LED_GRP_1 1
00111 #define LED_GRP_NONE 2
00112
00113 #define LED_ACTIVITY 0
00114 #define LED_NOACTIVITY 1
00115 #define LED_LINK 2
00116 #define LED_NOLINK 3
00117
00118 struct crisv32_eth_leds {
00119 unsigned int ledgrp;
00120 int led_active;
00121 unsigned long led_next_time;
00122 struct timer_list clear_led_timer;
00123 spinlock_t led_lock;
00124 int ifisup[2];
00125 };
00126
00127 #define NET_LED_SET(x,y) \
00128 do { \
00129 if (x == 0) LED_NETWORK_GRP0_SET(y); \
00130 if (x == 1) LED_NETWORK_GRP1_SET(y); \
00131 } while (0)
00132
00133
00134 struct crisv32_ethernet_local {
00135 dma_descr_context ctxt_in __attribute__ ((__aligned__(32)));
00136 dma_descr_context ctxt_out __attribute__ ((__aligned__(32)));
00137
00138 crisv32_eth_descr *active_rx_desc;
00139 crisv32_eth_descr *prev_rx_desc;
00140 crisv32_eth_descr *last_rx_desc;
00141
00142 crisv32_eth_descr *active_tx_desc;
00143 crisv32_eth_descr *prev_tx_desc;
00144 crisv32_eth_descr *catch_tx_desc;
00145
00146 crisv32_eth_descr dma_rx_descr_list[NBR_RX_DESC];
00147 crisv32_eth_descr dma_tx_descr_list[NBR_TX_DESC];
00148 #ifdef CONFIG_CRIS_MACH_ARTPEC3
00149 struct tx_buffer_list tx_intmem_buf_list[NBR_INTMEM_TX_BUF];
00150 struct tx_buffer_list *intmem_tx_buf_active;
00151 struct tx_buffer_list *intmem_tx_buf_catch;
00152 char gigabit_mode;
00153 #endif
00154 char new_rx_package;
00155
00156
00157 int eth_inst;
00158 int dma_in_inst;
00159 int dma_out_inst;
00160
00161
00162 struct timer_list speed_timer;
00163 int current_speed;
00164 int current_speed_selection;
00165 int sender_started;
00166 int txpackets;
00167
00168 struct crisv32_eth_leds *leds;
00169
00170
00171 struct timer_list duplex_timer;
00172 int full_duplex;
00173 enum duplex current_duplex;
00174
00175 struct net_device_stats stats;
00176
00177
00178 unsigned int mdio_phy_addr;
00179
00180 struct transceiver_ops *transceiver;
00181 unsigned long newbuf;
00182
00183
00184
00185
00186
00187 spinlock_t lock;
00188 spinlock_t transceiver_lock;
00189 };
00190
00191
00192 static int crisv32_ethernet_init(void);
00193 static int crisv32_ethernet_device_init(struct net_device* dev);
00194 static int crisv32_eth_open(struct net_device *dev);
00195 static int crisv32_eth_poll(struct net_device *dev, int *budget);
00196 static int crisv32_eth_close(struct net_device *dev);
00197 static int crisv32_eth_set_mac_address(struct net_device *dev, void *vpntr);
00198 static irqreturn_t crisv32rx_eth_interrupt(int irq, void *dev_id);
00199 static irqreturn_t crisv32tx_eth_interrupt(int irq, void *dev_id);
00200 static irqreturn_t crisv32nw_eth_interrupt(int irq, void *dev_id);
00201 static void crisv32_eth_receive_packet(struct net_device *dev);
00202 static int crisv32_eth_send_packet(struct sk_buff *skb, struct net_device *dev);
00203 static void crisv32_eth_hw_send_packet(unsigned char *buf, int length,
00204 void *priv);
00205 static void crisv32_eth_tx_timeout(struct net_device *dev);
00206 static void crisv32_eth_set_multicast_list(struct net_device *dev);
00207 static int crisv32_eth_ioctl(struct net_device *dev, struct ifreq *ifr,
00208 int cmd);
00209 static int crisv32_eth_set_config(struct net_device* dev, struct ifmap* map);
00210 #ifdef CONFIG_CRIS_MACH_ARTPEC3
00211 static void crisv32_eth_switch_intmem_usage(struct net_device *dev);
00212 #endif
00213 static void crisv32_eth_negotiate(struct net_device *dev);
00214 static void crisv32_eth_check_speed(unsigned long idev);
00215 static void crisv32_eth_set_speed(struct net_device *dev, unsigned long speed);
00216 static void crisv32_eth_check_duplex(unsigned long idev);
00217 static void crisv32_eth_set_duplex(struct net_device *dev, enum duplex);
00218 static int crisv32_eth_probe_transceiver(struct net_device *dev);
00219
00220 static struct ethtool_ops crisv32_ethtool_ops;
00221
00222 static void generic_check_speed(struct net_device *dev);
00223 static void generic_check_duplex(struct net_device *dev);
00224 static void broadcom_check_speed(struct net_device *dev);
00225 static void broadcom_check_duplex(struct net_device *dev);
00226 static void tdk_check_speed(struct net_device *dev);
00227 static void tdk_check_duplex(struct net_device *dev);
00228 static void intel_check_speed(struct net_device* dev);
00229 static void intel_check_duplex(struct net_device *dev);
00230 static void national_check_speed(struct net_device* dev);
00231 static void national_check_duplex(struct net_device *dev);
00232 static void vitesse_check_speed(struct net_device* dev);
00233 static void vitesse_check_duplex(struct net_device *dev);
00234
00235 #ifdef CONFIG_NET_POLL_CONTROLLER
00236 static void crisv32_netpoll(struct net_device* dev);
00237 #endif
00238
00239 static void crisv32_clear_network_leds(unsigned long dummy);
00240 static void crisv32_set_network_leds(int active, struct net_device* dev);
00241
00242 static void crisv32_eth_reset_tranceiver(struct net_device *dev);
00243 static unsigned short crisv32_eth_get_mdio_reg(struct net_device *dev,
00244 unsigned char reg_num);
00245 static void crisv32_eth_set_mdio_reg(struct net_device *dev,
00246 unsigned char reg_num,
00247 int val);
00248 static void crisv32_eth_send_mdio_cmd(struct net_device *dev,
00249 unsigned short cmd, int write_cmd);
00250 static void crisv32_eth_send_mdio_bit(struct net_device *dev,
00251 unsigned char bit);
00252 static unsigned char crisv32_eth_receive_mdio_bit(struct net_device *dev);
00253
00254 static struct net_device_stats *crisv32_get_stats(struct net_device *dev);
00255 static void crisv32_start_dma_out(struct crisv32_ethernet_local* np);
00256
00257
00258 #endif